M-LVDS for true multipoint interfaces on busses--and more

By David Mulcahy, Texas Instruments
Planet Analog (Mar 30, 2009)

Over the years, various technologies have been used to transmit signals over backplane busses. As speeds increase to cater to the ever-growing volume of telecom and datacom traffic, the limitation of the older, single-ended and emitter-coupled logic techniques becomes apparent.
Multipoint, low-voltage differential signaling (M-LVDS) is an interface standard similar to LVDS. It provides the benefits of high-speed, low-power, and low-EMI transmission solutions to today's bus applications. M-LVDS is suitable for data, control, synchronization and clock signals.

In today's backplanes, high-speed signals carrying the payload data are typically point-to-point (one driver and one receiver) interfaces. These connect various core chips such as ASICs, FPGAs, DSPs, and similar. Properly terminated point-to-point interfaces offer the best performance for high-speed signals. Signaling levels used can be PECL, CML, VML and LVDS with speeds going up to 4Gbps and higher, Figure 1.

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