Deinterlacing with FPGA for HDTVs

Much of today's video content is available in the legacy interlaced format, but almost all of the newer displays -- LCD or Plasma -- require progressive video input.

By Suhel Dhanani, Altera Corporation
pldesignline.com (July 15, 2009)

Deinterlacing is a video processing function that is required to address legacy problems stemming from the generation of interlaced video that was widely used by the old analog CRT televisions.

An interlaced video is a succession of 50/60 fields per second, where each field carries only half of the rows that are displayed in each frame of video. In some ways interlaced video was an elementary compression technique when older display technologies were based on cathode ray tubes (i.e. CRTs).

Today deinterlacing video is an important video processing function, as much of the video content is available in the legacy interlaced format and almost all of the newer displays -- LCD or Plasma -- require progressive video input. While deinterlacing is required in many systems, it is by nature complex and no deinterlacing algorithm can produce a perfect progressive image.

This article explores the different deinterlacing techniques and examines how FPGAs are increasingly being used for any sufficiently complex deinterlacing function. The article also examines the hardware tradeoffs when implementing different deinterlacing algorithms.

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