When Dis-integration is a better solution

When Dis-integration is a better solution
By Kathy Tobin, Manager,Mobile Information,Solutions Initiative,Agilent Technologies Inc.,, EE Times
October 4, 2001 (3:49 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011004S0105

For the past 15 years, the prevailing system-on-chip (SoC) design philosophy has been to push the limits of integration. With the ever-increasing demand to shrink mobile devices while increasing their battery life, the design criterion for the digital portion of mobile devices such as PDAs, MP3 players, mobile wireless clients and mobile phones has been to attempt to integrate as many of the discrete functions into as few ICs as possible.

Without question, today's mobile devices could not be so incredibly small without a massive amount of integration of both digital and analog circuitry. The combination of digital logic; microprocessor technology; embedded memories, such as DRAM and flash; and analog elements, such as clocks, transceivers, and phase-locked loops, has greatly reduced the size and manufacturing costs of mobile devices. The assumption has been that by combining more of the system-level functions into a single integrated circuit, the o verall system cost would be lower as well. But that is not necessarily the case.

No one can dispute the technical merits of super-integrated solutions, but in today's product development environment, there are other considerations. The additional design time required for the highest-possible level of integration, coupled with the additional time and costs devoted to developing and producing a highly complex ASIC, can easily make a product simply too expensive to be profitably sold into a given market niche.

With ever-shortening development cycles and the ever-increasing complexity of mobile devices, design teams must carefully consider the additional time required to develop and produce a superchip — time that could easily add three to six months to a design cycle.

Given the constantly increasing cost of designing and manufacturing large chips in sub-100-nanometer technologies, designers must consider not only the manufacturing cost of a component but also the design performance specificatio ns, and development cost, complexity and risk before making a decision on superintegration. With lower-priced components, the break-even volume can be quite high, even for relatively low-investment development programs.

One challenge companies face today is the split responsibility of development and manufacturing costs. Often, different elements of an organization are responsible for different elements of the balance sheet (cost of sales vs. R&D expense). That split will sometimes drive a design manager to trade off material costs in favor of lower development costs. Careful consideration must be given to that trade-off to assure that the final choice optimizes the entire life cycle of the product and not simply one aspect of its expense structure.

If a product does not reach extremely high volumes, the cost of development could quickly dwarf the actual silicon and packaging costs of the chip. Developers must now consider the cost of a custom solution compared with those of an application-specific standard product. Today's "off-the-shelf" ASSP ICs include the CPU, memory manager, USB slave and display driver as standard.

Highly integrated ASSPs not only offer the cost savings of integration but enable the costs of developing the circuit to be shared among many products and manufacturers.

As more and more functions in mobile devices can be performed through embedded processors, the ability to fix problems with software mitigates concerns about what will happen if a design flaw is found late in the design cycle. Using off-the-shelf integrated devices with embedded processors is an approach that lands in the middle ground.

These highly integrated devices offer the advantage of integration with the cost and development advantages of using discrete functional blocks. Designers can use other discrete components to differentiate their product or add features not integrated in an off-the-shelf device.

As electrical component designs have evolved over the past 10 years, off-the-shelf compon ents have offered the best of both worlds: high integration and standard product prices. These components typically do not enable a supplier to be first to market, but they do enable a system supplier to reach the lowest total system cost.

With the ever-increasing number of product iterations and permutations, a product design team must carefully weigh the benefits of a discrete solution against those of a highly integrated one.