An FPGA-based dual-image sensor design solution

Ted Marena, Lattice Semiconductor
EETimes (3/27/2012 2:48 PM EDT)

When one thinks about an application with two image sensors, the first thought is likely to be a 3D camera. However, there are numerous designs that can be improved by using the data from two image sensors.

One example is Black Box Car Driver Recorders (CDRs), which typically are mounted near the rear view mirror and incorporate two cameras (Figure 1). One camera points out the windshield and the other camera points at the driver. The camera video is stored on a local memory chip and can be retrieved if there is an accident or dispute.

Other applications for two cameras and their data include precision analytics in surveillance and pedestrian detection in automobiles. In these designs, the output of both cameras is used to create an algorithm that includes depth perception. With this data, a processor can very accurately “see” images and discern people from shadows or other objects.

All these designs require an Image Signal Processor, (ISP). However, supporting two sensors for an ISP is not straightforward. Although most ISPs can support the throughput of two image sensors, the vast majority of ISP devices have been designed to interface to only one sensor.

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