Zynq design from scratch

Sven Andersson (ZooCad Consulting)
March 11, 2014

Almost a year ago I received a parcel by post from US. When I opened the parcel I found this box.

The ZedBoard was a present from someone involved in promoting the new Zynq device from Xilinx, but with no strings attached. At that time I was busy working as an ASIC designer and had no time to play with the board. It wasn't until December in 2013 that I had a chance to unpack the box and power-up the ZedBoard.

At that time I got an email from Per and Andreas at Silica (Avnet) here in Stockholm, where they offered a one day hands-on training class on the Zynq-7000 using the ZedBoard, part of the "Xilinx Speedway Design Workshops". Here is what this workshop covered:

Introduction to the Zynq-7000 in Vivado AP SoC

"This class demonstrates the techniques and tools used to create a basic Zynq-7000 AP SoC design. Through a series of instructor presentations and hands-on labs, hardware and firmware developers will learn the required steps for creating a complete Zynq-7000 AP SoC design on ZedBoard. The Zynq-7000 AP SoC architecture is explained, including the ARM® Cortex™-A9 processing system (PS) and the 7 series programmable logic (PL). The course also details the individual components that comprise the PS such as I/O peripherals, clocking, interrupt, AXI interfaces and memory controllers. Emphasis will be placed on efficient PL-to-PS interfacing including processing interrupts generated from a PL peripheral. To complete the design flow, the critical steps of hardware and software debugging techniques will be shown".

This training session was the head start I needed. I went home and started to play with my ZedBoard. At the same time a decided to write this blog and here we are. All of you who have read my "FPGA design from scratch" blog will feel at home. I will follow the same idea and describe the whole design flow in an easy to understand fashion.