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SoC fills the wireless differentiation vacuum
SoC fills the wireless differentiation vacuum Lack of differentiation has been a deadly problem inherent to system-on-chip-based wireless devices. Interoperability and regulatory requirements constrain the design of terminals and basestations to a quite narrow range of choices. The need for the highest affordable level of integration imposes even further restrictions on the design. Not only does the radio have to comply with standards and regulations, it must comply with the current state of the art in SoC design. The search for a way out isn't easy. It is always possible to slightly increase the integration level of a digital radio by simply attacking the design with overwhelming technical force. But this may end up trading system cost and performance for a small change in parts count. It is also possible to make improvements in energy efficiency, noise figures of merit or digital algorithms without defying the laws of nature. But it is rare that these hard-won benefits are visible at the syst em level. As vendors scramble to gain an advantage in the self-imposed maze of wireless-data standards, however, some opportunities for differentiation may be emerging. One interesting issue is signal quality. It has already become clear that the ability to deal with complex multipath environments is critical to the field performance of wireless networks, whether fixed or mobile. Some designers are predicting that as the population of terminals and access points increases, interference between channels will become just as big a problem. End users will be in for a really frustrating experience, much as has happened with supposedly debugged CDMA voice service, except that Windows is not as tolerant of interrupted network connections as is a typical phone user. The answer to both these problems could well lie in antenna technology. The simple approach is to provide two or more antennas-each with a different pattern-in a terminal. The receiver would pick between them, perhaps on a packet-by-packet basis, to get the best signal. This involves a certain amount of redundancy in the RF section but otherwise has little impact on the SoC design. More elaborate approaches involve beam-forming algorithms. This choice requires a relatively small number of antennas, but it demands more RF redundancy and a significant increase in computation in the digital baseband. Hence it will be necessary to carefully model the field performance of a design and the costs and power penalty incurred. But system-level chip technology may provide important benefits here. Designers have already shown that it's feasible to put the RF low-noise amplifier on the SoC. Putting several LNAs on the chip instead of one will likely become easier in advanced processes. Similarly, designers can count on improved speed and density, giving them more room for advanced signal processing to handle beam-forming tasks. So the headroom available in SoC design may translate-with careful planning-into changing "I can't get this thing to connect" i nto "I'm not having any problem-what card are you using?" Ron Wilson (rwilson@cmp.com) is Editor, Silicon Engineering, for EE Times. He covers the emerging design process for systems-on-chipfrom architecture, implementation and flows to test and yield.
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