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Unleashing EEPROM Potential by Going Embedded: Introducing eMemory's NeoEEBy eMemory EEPROM memory, which recently celebrated its 50th birthday, continues to defy obsolescence. Despite its age, EEPROM remains a mature, reliable, and affordable technology for many electronic systems. As IC designers embed EEPROM onto chips, it has become an integral part of chip design, offering essential benefits to applications such as MCU, PMIC, sensors, and RFID tags. Recent advances in embedded EEPROM IPs, such as eMemory's NeoEE, have revolutionized the field. NeoEE delivers extremely high endurance levels while retaining low power consumption, providing a value-adding choice for IC designers to integrate NVM (Non-Volatile Memory) into their designs. Enhancing Smart Devices with Multiple Programming EEPROM Electronic systems today have become increasingly sophisticated, with smart devices that sense the environment, execute algorithms, and react accurately. For example, in smartphone cameras, the camera module captures high-resolution images instantly. The voice-coil motor (VCM), controlled by the driver IC, accurately guides the lights onto the image sensor. The VCM driver requires an EEPROM to store configuration and parameters. NeoEE enables embedding EEPROM onto the VCM driver, creating a single-chip solution. Driving Flexibility in Power Management ICs and More Power management ICs (PMICs) play a critical role in electronic devices. While One Time Programmable (OTP) Memory has been the traditional choice for storing trimming and chip configurations, the growing complexity of the design process necessitates flexibility. Multiple Time Programmable (MTP) solutions offer added convenience, allowing system engineers to experiment, debug, and change parameters in real time without altering external components. NeoEE, with its MTP capability, reduces development time and accelerates production. NeoEE's multi-times programmable feature provides versatility in applications such as tuning or calibrating sensor performance, changing fitting curves for analog output circuits, and adjusting parameters to match different circuit loadings. It offers flexibility for vendors in the supply chain to adjust their products at different development stages as needed. High-Endurance Feature based on Fowler-Nordheim Tunneling Compared to other non-volatile MTP memory solutions, EEPROM stands out with its higher endurance levels, often reaching 100,000 cycles. NeoEE, utilizing Fowler-Nordheim tunneling (F-N tunneling) for program and erase operations, provides high-endurance and low power consumption across a wide operating temperature range, making it an ideal choice for demanding applications. The high endurance proves to be advantageous in specific applications. For instance, Serial-Presence Detect (SPD) EEPROMs, responsible for storing DRAM module configurations and parameters, need to meet the 100,000 endurance cycles required by JEDEC standards. In this scenario, NeoEE's exceptional high-endurance feature positions it as the most suitable solution. Additionally, RFID tags require NVM as EPC (Electronic Product Code) memory according to EPCglobal, which is a standard defined by the GS1 organization. NeoEE's combination of low power operation and high endurance makes it an ideal choice for RFID chip manufacturers seeking reliable and efficient solutions. NeoEE's Robust Memory Cell Design One of the notable advantages of NeoEE is its robust memory cell design. During the early stages of development, eMemory carefully selected a cell structure with a good coupling ratio. This design ensures that the applied voltage on the control gate effectively induces an electric potential attracting charges to flow into the floating gate while being precisely controlled. The result is a more durable memory cell that consumes less power during the program/erase operations. The compact memory cell design also allows for smaller charge pumps and contributes to a streamlined peripheral circuit design for the IP macro. While memory cell structure is crucial, peripheral circuit design also plays a significant role in the overall IP. Some MTP memory solutions may optimize for smaller memory cells, but this often leads to increased costs in other areas such as lower production yield, reduced reliability, more complex operation schemes, and larger peripheral circuits. In contrast, NeoEE's compact peripheral circuit design brings unparallel benefits to applications requiring small density NVM (e.g., less than 4Kbits). Customizable IP Design for Diverse Applications eMemory understands the need for flexibility in IP design to meet various application requirements. As shown in Fig.1, NeoEE allows for the implementation of separated NVM blocks, enabling the storage of different information per individual memory block. This flexibility provides freedom in designing versatile operation schemes. Moreover, eMemory also provides floorplans, high-voltage circuitry, and the design shares control terminals for each block to ensure minimum compromise on the area. Figure 1 The storage of different information per individual memory block Fig. 2 illustrates another valuable feature of NeoEE: resizable memory units. Customers can utilize the same NeoEE IP for different projects and adjust the NVM size by adding or removing memory macros according to their needs. This capability offers exceptional flexibility and hastens the time to market down the road. Furthermore, special read/write schemes to access different memory blocks are achievable by incorporating enablers for each block's macros. These optional features exemplify eMemory's commitment to meeting customers' needs and optimizing their chip design. Conclusion With the exponential growth of interconnected IoT devices, the demand for advanced ASSPs and ASICs is on the rise. NeoEE, with its exceptional specifications, serves as an ideal solution for these devices. Its easy-to-use adoption, combined with versatility and outstanding chip verification record, makes NeoEE well-suited for compound, advanced, and emerging applications. eMemory believes that NeoEE can provide a solid steppingstone for constructing ideas and achieving development goals. If you wish to download a copy of this white paper, click here
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