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Making the Most Out of 802.3af
Making the Most Out of 802.3af In order to make Ethernet switching devices and wireless access points more pervasive, carriers and equipment managers need a more efficient scheme for powering these systems. Answering the call, the IEEE has developed the 802.3af specification, which allows designers to power up their system designs over Ethernet connections using a media independent interface. In this tutorial, we'll take an inner look at the key technical features provided by 802.3af. During the discussion, we'll look at the pairs designers can use to power devices. We'll also examine the signature detection process and power requirements. Let's start, however, by looking at the basics of 802.3af. 802.3af: Making it Work Given the existence of both of these problems, the IEEE 802.3af standard requires a specific "detection signature" to appear on a port before allowing significant power to be placed on the cable. Now, as long as none of the existing non-PoE devices display the correct signature, there is a method to distinguish between a device that wants to receive PoE and a device that is incapable of PoE. This requirement, however, places a burden of 'smarts' on the end of the cable sourcing the power, referred to in the standard as the power sourcing equipment (PSE). It is defined in the standard that the PSE shall place low voltage pulses onto a port and look for 'signatures', a process referred to as "detection". It is important to understand how the power is placed onto the data lines in order to understand how to present the correct signature during PSE detection. The standard defines two alternatives for powering up devices: A and B. Alternative A allows the PSE to place power on the signal (data) pair as shown in Figure 1a. Alternative B allows the PSE to place power directly on the spare pair, as sown in Figure 1b. It is important to note that, according to the standard, it is not allowable to implement both in a PSE, but necessary as a praticality to accept both in a PD.
Upon further examination of these figures, it should quickly become clear that the polarity of power can be in either direction and is implementation specific. Therefore, 802.3af-compliant powered devices (PDs) must be polarity independent and able to draw power over either alternative A or alternative B. This is the only way to guarantee interoperability as the standard does not require the PSE to implement either alternative nor does it specify polarity using that alternative. The good news is that polarity insensitivity can be accomplished by making use of diode rectifier bridges off of both sets of pairs. A typcial application diagram for the front end of a PD using an IC is shown in Figure 2 and should help illustrate this point. Ethernet appliances using diode bridges in their solution should remember to take into account these diode drops when designing their power solutions.
Setting Up Detection Signatures In order to maximize the power available for use by the PD, it is often convenient to switch out the detection resistance once detection has occurred. A PD IC controller is the simplest means to accomplish this task. It is also important to note that the PD resistance must be a total system resistance and using an IC with an internal resistance reduces the designer's ability to offset system parasitics. In Figure 2 above, it is assumed that the IC will have an external detection resistor that will be switched off at voltages greater than the detection voltages, defined by the standard to be 2.7 to 10 V at the PD. Although the standard is only recently ratified, earlier in-line power solutions do exist in the field. That is, there were a few leading edge companies who had a proprietary means of providing power over CAT5 cables in their Ethernet solutions. These are known as legacy solutions, as they were developed before the standard was written or ratified. Cisco is one of the larger companies who had a proprietary method for powering their IP phones over the network. For those who are looking for maximum interoperability in the market, it is necessary to create a PD that can handle both IEEE 802.3af detection as well as the Cisco legacy method of detection. Cisco refers to their detection method as fast link pulse (FLP). Cisco makes use of a special physical layer (PHY) or external circuitry around a PHY to detect whether a device is able to accept power over the CAT5 cable. By making use of relays or filters, Cisco requires that the transmit (Tx) and receive (Rx) pairs look like they are shorted for certain frequency pulses when the PHY is unpowered. Thus, if a Cisco PSE places a certain frequency pulse down the Tx lines and sees it return on the Rx lines, the Cisco PSE recognizes that this device is capable of receiving power and powers up the device. Upon power up, obviously, the PHY may no longer look like a short for all data frequencies and the relays must open. Many PHY manufacturers support Cisco legacy PSE detection. Figure 3 shows a typical front-end application compliant with both IEEE 802.3af detection and also Cisco FLP.
Optional Classification The IEEE standard defines four classes of power and leaves a fifth one as reserved for later use. Class 0 (zero) is the default class and requests full power from the PSE. Class 1 is about a quarter of full power and informs the PSE that it only requires something less than 4W. Class 2 is closer to half power, requesting only 7 W from the PSE. Class 3 is similar to Class 0 in that it also requests full power, but a Class 3 PD could reserve as little as 7 W from the PSE according to the standard, whereas a Class 0 device always reserves 15.4-W minimum from the PSE. Some system designers may believe that classification is a costly feature that should be avoided, especially since it is optional. However, most PD ICs, only requires a single external resistor to implement classification. The advantage of using classification in a PD is that it allows PSE manufacturers to develop cheaper solutions and further enables proliferation of PoE. By developing a PD that implements classification, PSE manufacturers can develop a higher-level power management function. This allows the system to use power supplies that supply less than 15 W per port across all of the ports in the system. This is a big advantage in the market and will help drive PoE implementations by getting the most out of the standard. Getting PowerFinally Since most PD applications are not run directly off of 48 V, the typical PD front end makes use of a DC/DC converter to generate more convenient lower voltages. In order to add more flexibility in choosing a DC/DC converter, most PD ICs have an on-board undervoltage lockout (UVLO) function provided and some form of a "power good" output. This allows a PD designer to now make use of a cheaper DC/DC converter that does not have a UVLO function. Additionally, a DC/DC converter in the front end will usually make use of a bypass capacitor. This bypass capacitance looks like a short to the PSE trying to power the PD and will draw a large instantaneous current. However, according to the IEEE specification, the maximum a PD is allowed to draw is 450 mA. To manage PD currents, a PSE will start a timer that trips within 50 to 75 ms if the current does not drop back below the 15.4W/Vport level. Thus, limiting the input capacitance of a DC/DC converter used in a PD. However, if the front end of the PD implemented a current limit such that the current drawn from the PSE was maintained at some preset level, the PD could continue to draw current for an indefinite period without fear of being shut off by the PSE, thereby allowing the input capacitance to fully charge. Many ICs out there perform this function, an implementation of which is shown in Figure 2, where an Rlimit resistor is used to program the current limit. Finally, once the power has come up in the PD, there is a requirement in the IEEE standard to current limit the PD to 400 mA during normal operation. This is also provided by most PD ICs. Though the specification is set up for 400 mA, allowing for more current to be drawn by a PD is actually a benefit as it allows the PSE to see that a PD has drawn over the available current and shut it down. If the PSE's current threshold and the PD's current limit overlap, it is possible that a DC/DC Converter that is shorted could continuously draw power from the PSE without a fault being detected and the PD being powered down. This is a serious drain and waste of power from a PSE. Therefore, it seems more appropriate for a PD to set its current limit higher than the PSE's current threshold to allow the PSE to see the overcurrent fault, but at the same time, still protect the PD from damage. Selecting an IC with a current limit above the PSE threshold will also help maximize the PoE standard. Wrap Up Close attention to detail and following the intent and letter of the standard will maximize a products' attractiveness in the market and ensure interoperability across many PD platforms. Making use of ICs to create the front end of a PD will help maximize compliance to the standard and compatibility in the industry. Look for ICs that make use of University of New Hampshire's Interoperability Lab to test for IEEE compliance and interoperability with many existing Ethernet devices. This saves time and resources for the PD maker as it eliminates the necessity of going through this operation on their own. Thus, choosing an IC, and choosing the right IC, can help any PD manufacturer maximize their compliance and interoperability within the PoE standard. About the Author
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