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Unlock and Load: Characterizing Today's PLLs Marcus da Silva, Tektronix The phase-locked loop (PLL) has become one of the most versatile tools in the communication sector. PLLs are at the heart of circuits and devices ranging from clock recovery blocks in data communications systems to the local-oscillators that power cellular phones. And since their output frequency is always an exact multiple of the reference frequency, PLLs are the circuit of choice for frequency synthesizers, synchronous systems that require clock alignment and myriad applications, such as tracking satellite Doppler shift and sensing minute reactance changes in industrial proximity sensors. Much work has been done to describe PLLs as linear feedback control systems. The linear steady-state approximation provides an accurate description of PLL operation for small variations about a stable, locked state. Linear analysis, along with measurements performed in the frequency domain, are more than adequate to describe small signal effects such as PLL response to small signal modulation, phase noise or spurious signals. Performance measurements of linear behavior are most often conducted using traditional spectrum and network analyzers. PLLs, however, behave very differently from their linear models when they are far from lock, during switching transients, and when responding to large signal inputs. Non-linear operation often dominates critical parameters such as settling time, switching speed and capture range. Therefore, an understanding of both linear and non-linear behavior is critical to effectively characterize PLLs. Knowledge of both linear and non-linear operation is also vital to meeting emissions requirements in frequency agile communications systems that use PLLs as part of frequency-hopping oscillators. Non-linear analysis is most often conducted in the time-domain with performance measurements made using in-circuit probes and oscilloscopes. The advent of large-scale, mixed-signal integrated circuits (ICs) has pushed much of the PLL circuitry onto monolithic ICs, making it impractical to probe the necessary signals. This creates a need for time domain measurements with spectrum analyzers of frequency and phase using only the PLL output signal. Building Blocks The building blocks common to most PLLs are the phase detector, loop filter, voltage controlled oscillator (VCO) and frequency divider (Figure 1). Each of these components has both linear and non-linear attributes to its operation.
Figure 1: Diagram showing the building blocks of a PLL. In a PLL design, the VCO has an output frequency that is controlled through a tuning signal. This tuning signal is typically a voltage, as the name implies, but can be a different variable as well. Current-controlled oscillators, numerically-controlled oscillators, and even mechanically controlled oscillators are possible. The tuning sensitivity of the VCO, KV, is its most significant parameter in linear analysis. VCO's are often non-linear, having tuning sensitivities that vary greatly over their tuning range. PLLs employing VCOs with large changes in the tuning sensitivity often require gain compensation to maintain consistent performance. VCOs also have other non-linear behaviors that need consideration, including minimum and maximum tune frequencies and tune voltages where oscillations stop or undesired frequency components are generated. Frequency Divider Integer-N dividers operate in linear fashion over their specified range of divisors and frequencies, scaling both phase and frequency by a constant value. Fractional-N dividers achieve approximate non-integer ratios by alternating among several integer values. This non-linear operation generally produces spurious signals that require filtering, correction or a combination of both. Phase Detector The phase-frequency detector has a linear operating range of +/-2π radians and often incorporates current or voltage sources that are gated on or off by the flip-flop logic states. The frequency steering operation pushes the loop in the direction of lock when the linear range is exceeded. Some phase-frequency detectors also have a small "dead-zone" or non-linearity in the vicinity of zero phase difference, requiring a phase offset to force the quiescent lock point away from zero. The phase-frequency detector output resets whenever the phase difference between the two signals present at its inputs exceeds 2π radians. Successive resets, which can only be caused by an out-of-lock condition, place the phase-frequency detector in frequency-steering mode. In frequency-steering mode, the phase-frequency detector provides a pulsed signal that pushes the VCO in the correct direction for locking. The PLL is effectively open during frequency steering and the transients' performance do not show the settling waveforms expected from a linear feedback control system. The phase-frequency detector (Figure 2) returns to phase detection mode once the output frequency is close to the frequency of lock.
Figure 2: Diagram showing phase-frequency detector operation. A multiplier or mixer can also be used as a phase detector. It can be shown that the output of the mixer is proportional to the sine of the phase difference between the two inputs. Loop Filter Loop filters often include integrators and are subject to the linearity concerns of the active devices that comprise the integrator circuits. Op-amps, for example, become non-linear as the output voltage clips when it nears the power supply voltages. Measuring Stable Behavior The PLL transfer function is often used to improve the phase stability of an oscillator, where a reference signal with low phase noise is used to improve the phase noise of a higher frequency VCO. The phase noise of the reference and the phase detector noise multiplied by N dominate low frequencies while the phase noise of the VCO dominates high frequencies (Figure 3). Other sources of phase modulation, such as noise and spurious signals, are similarly affected by the PLL.
Figure 3: The phase transfer function of a fourth-order PLL in response to phase fluctuations in both the reference and the VCO. Measuring Phase Noise and Spurious Signals Fluctuations can also be viewed as a combination of random phase modulation, called phase noise, and deterministic phase modulation, frequently called spurious signals. Phase noise is most often expressed as a ratio of sideband power in a 1 Hz bandwidth to the signal power expressed in dBc/Hz. Spurious signals are expressed as a ratio of power in a particular spurious sideband to the power in the main output signal expressed in dB. Real-time spectrum analyzers can measure phase noise directly using the carrier-to-noise ratio (C/N) measurement. This measurement can be made with direct readings that provide the C/N in a specified bandwidth as well as the C/N in a 1 Hz bandwidth (C/No). An alternate approach is to use marker readings which provide marker power measurements in a given resolution bandwidth as well as the power normalized to a 1 Hz bandwidth. Delta-Markers can be used to measure spurious signals directly. Figure 4 shows the C/N measurement screen and the phase noise plot of a PLL output. In the display shown, the C/N is measured at a 2 KHz offset from the carrier center frequency. The C/N in a specified noise bandwidth of 100 Hz is 25.21 DB and the C/No (in a 1 Hz bandwidth) is 45.21 dB as shown on the lower left corner of the screen.
Figure 4: diagram showing C/N, C/No, and phase noise plots. As shown in Figure 4, changing the offset frequency (shown in the gray area at the upper right) allows direct measurement at each offset of interest. Measurements taken at several offsets are plotted as single-sideband (SSB) phase noise in the graph, along with the phase noise of the same VCO when unlocked and the typical measurement noise floor of the real-time spectrum analyzer. Measuring Transient Behavior
Figure 5: Measuring switching speed using a frequency mask trigger. Note the linear and non-linear regions. Linear analysis can predict behavior beyond 1.3 ms, but not before it. Therefore, time-domain modeling, usually performed using Z-transform techniques, and direct measurements are needed for the non-linear portion of the switching transient. The real-time spectrum analyzer can be triggered externally, using signals from a source such as the control bus, or internally using a frequency mask trigger. This trigger can be set up to start an acquisition at the instant the spectrum crosses a predetermined mask. In Figure 5 above, the mask is set up to trigger the instant the oscillator frequency crosses the destination frequency (2.45146 GHz) as shown at the top-right trace. The trigger occurs and is marked by the blue T in the upper-left trace. Viewing both pre-trigger and post-trigger data as indicated by the green bar on the upper-left trace in Figure 5 allows the analysis of the frequency trajectory leading to the frequency switch as well as the trajectory after it is shown on the lower trace. The spectrum at a given point in time, indicated by the red bar in the upper-left trace of Figure 5, can be shown on the upper-right trace. The delta markers in the lower trace show a switching speed of 2.259 ms for settling to within 100 KHz of the final frequency. The first 1.3 ms of the switching time were occupied by non-linear frequency steering. The remainder of the switching time was occupied by closed-loop settling, which can be sufficiently approximated using linear analysis techniques. Time-Dependent Spectrum Analysis Figure 6 shows time-correlated views of a PLL frequency switching transient. The first display shows the spectrum of the signal during the transient portion of the settling as indicated by the red marker in the lower trace. Note the high level of reference-related spurious signals at multiples of 3 MHz offset. The second display shows the spectrum of the same signal after settling, where the reference spurs are effectively gone.
Figure 6: Spectrum of a PLL output during a frequency switching transient and after settling. Unlock and Load Real-Time Spectrum Analysis provides a valuable means to characterize, measure and view the behavior of PLLs in the time, frequency, and modulation domains, opening the door to previously hidden transient behavior. References
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