| To support increasing data traffic, network operators are adding high-speed data technologies such as Edge (E-GPRS) and W-CDMA (UMTS) on the existing GSM network with backward compatibility to legacy services. This is creating the need for multimode cellular handsets to support GSM, GPRS, Edge and W-CDMA standards. Such support creates numerous handset design challenges, however, particularly with respect to the radio. Front-end requirements of the radio are especially challenging. In General Packet Radio Service and Edge, time-division duplex requires the radio to be switched between transmit and receive modes through an antenna switch module. Wideband CDMA is based on frequency-division duplex, so the transmitter and the receiver are switched on simultaneously through a duplexer. To permit worldwide roaming, five frequency bands should be supported: GSM 850, E-GSM 900, DCS 1,800, PCS 1,900 and UMTS 2,100. Other bands such as railway GSM and GSM 400 may also require support. An additional challenge exists in the radio-clocking requirements. The channel spacing for GSM/GPRS/Edge is 200 kHz, compared with a wide 5-MHz channel spacing for W-CDMA. The channel bit rates for GSM/GPRS/Edge are based on a 13- or 26-MHz reference clock, whereas the chip rate for W-CDMA is based on a 19.2-MHz reference clock. The interface between the radio and the baseband processor must also be properly defined to support multimode. Conventional GSM/GPRS handsets use either a four- or eight-wire analog interface to pass I (inverse) and Q (quadrature) data. Control is provided by a three-wire serial programming interface. The same interface may be used for Edge. However, W-CDMA handsets require a high-speed interface, implemented as either an eight-wire analog interface or a digital interface that may be activated at the same time as GSM/GPRS/Edge, depending on handoff requirements for the cellular network. The modulation used for Edge and W-CDMA creates a radio architecture challenge for coexistence with GSM/GPRS. Unlike GSM/GPRS, which supports GMSK phase modulation only, Edge and W-CDMA support 8-PSK and QPSK modulation, which require both amplitude and phase modulation. Conventional GSM/GPRS transmitter architectures that support phase modulation only, such as the offset phase-locked loop (OPLL), are not directly applicable to Edge or W-CDMA. To support Edge or W-CDMA in addition to GSM/GPRS, the entire radio architecture must be reconsidered. The receiver must provide excellent amplitude modulation (AM) suppression performance in the presence of GSM/GPRS blockers that are constant-amplitude, as well as Edge or W-CDMA blockers that are amplitude-modulated. In addition, the transmitter must upconvert, filter and amplify the baseband I and Q signals with high modulation accuracy. For Edge or W-CDMA, linearity must be maintained through the entire transmitter chain from baseband I and Q signals through the antenna. To satisfy both constraints, one approach is to employ a digital low-IF receiver architecture and a linear transmitter architecture. The digital low-IF receiver provides superior suppression of dc offsets such as those produced from local-oscillator self-mixing, reciprocal mixing or second-order nonlinearity in the presence of blockers during the AM-suppression test. Unlike direct-conversion receivers, which require baseband software correction of dc offsets, the digital low-IF receiver mixes the dc offset away from the desired signal and suppresses it using a digital filter. No dc offset compensation is required. Unlike polar loop or polar modulation, which require a special or customized power amplifier, the linear transmitter is compatible with PAs from multiple vendors. Furthermore, the linear architecture avoids handset design challenges that are unique to polar architectures, including precise delay matching of amplitude and phase signal pathways, loop instability under voltage standing-wave ratio or during PA ramping, complicated PA calibration and incompatibility with W-CDMA. To create a linear transmitter, one approach is to add a companion chip to an existing GSM/GPRS transceiver. In GSM/GPRS mode, the companion chip is bypassed. In Edge or W-CDMA mode, the transceiver OPLL acts as a local oscillator to directly modulate the baseband I and Q signals. This approach has the advantage of preserving excellent GSM/GPRS performance while also positioning the radio to take advantage of several important integration trends. Three key trends hold great promise: integration of front-end components into front-end modules; integration of sensitive components into the transceiver, including loop filters, voltage-controlled oscillator (VCO) tuning components and a digitally controlled crystal oscillator (DCXO); and integration of a high-speed digital interface between the transceiver and the baseband processor. Integration of the radio front end is currently focused along two pathways: to integrate the switch/duplexer and receive SAW filters into a single package or to integrate the PA and switch/duplexer. When the switch/duplexer and receive SAW filters are integrated, the principal design challenge is to minimize insertion loss while maintaining excellent rejection of blockers, thus improving receiver sensitivity while maintaining linearity. For W-CDMA, the duplexer is especially important since it must provide high isolation of the transmit signal in the receive band. When the PA and switch are integrated, transmitter harmonic suppression can be improved by optimizing the tuning of harmonic filters in the switch to the PA. The receive SAW filters can be integrated into a single filter bank that includes matching components to the transceiver low-noise amplifiers. Integrating all VCOs and frequency synthesizers is now a standard feature in most transceiver designs. It is less common to integrate loop filters, VCO tuning components and the DCXO varactor, but that's critically important to ensure the best radio performance. Integrating this circuitry helps shield the local oscillators from external noise sources, improving linearity, phase error and tuning range for the automatic frequency control loop. Costly precision discrete components such as film capacitors are eliminated from the bill of materials. To extend the level of transceiver integration even further, CMOS process technology offers some compelling benefits. These include smaller feature size, wide availability among multiple foundries and true mixed-signal functionality. In the future, further integration of CMOS transceivers promises to eliminate all mixed-signal functions from the baseband processor. This trend enables a single mixed-signal transceiver to interface directly to an all-digital baseband processor via a high-speed digital interface such as the interface based on the DigRF standard. It also allows the baseband to scale directly into the latest-generation process technology. As multimode handsets gain momentum, such integration trends will continue to lead to best-in-class performance, resulting in very highly integrated multimode radios. Radios that offer best-in-class RF performance in single-mode environments will be the leading logical choices for multimode implementations. Patrick Morgan (morgan@silabs.com) is product-marketing manager for Silicon Laboratories Inc. (Austin, Texas).  See related chart | 
