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| 543 Results (521 - 543) |
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Reuse eases wireless SoC efforts
Feb. 26, 2001 - Reuse eases wireless SoC efforts -
Customized DSP -> DSP IP cores fuel PLD adoption
Mar. 12, 2001 - Customized DSP -> DSP IP cores fuel PLD adoption -
Keynoter urges more talk about SoC design issues
Mar. 22, 2001 - Keynoter urges more talk about SoC design issues -
Designers find tools, intellectual property wanting
Mar. 29, 2001 - Designers find tools, intellectual property wanting -
Opto-electronics -> Passive filters upgrade jitter testing
Feb. 14, 2002 - Opto-electronics -> Passive filters upgrade jitter testing -
Opto-electronics -> Architectural synthesis provides flexibilty in optical network design
Feb. 14, 2002 - Opto-electronics -> Architectural synthesis provides flexibilty in optical network design -
Soc Design -> Codesign tools aren't ready yet for SoC era
Sep. 13, 2001 - Soc Design -> Codesign tools aren't ready yet for SoC era -
Mixed-signal tools fall short for SoC designs
Oct. 04, 2001 - Mixed-signal tools fall short for SoC designs -
Market Focus: Analog/mixed-signal
Oct. 16, 2001 - Market Focus: Analog/mixed-signal -
SoC test requirements debated
Nov. 02, 2001 - SoC test requirements debated -
Gearing Up For The Next Round Of Security Processors
Nov. 12, 2001 - Gearing Up For The Next Round Of Security Processors -
High-Performance DSPs -> New Needs and Applications Drive DSPs
Nov. 15, 2001 - High-Performance DSPs -> New Needs and Applications Drive DSPs -
High-Performance DSPs -> Reconfigurable coprocessors create flexibility in DSP apps
Nov. 15, 2001 - High-Performance DSPs -> Reconfigurable coprocessors create flexibility in DSP apps -
Slump doesn't ease ASIC time-to-market pressures
Nov. 30, 2001 - Slump doesn't ease ASIC time-to-market pressures -
Reuse of system-level model key
Dec. 05, 2001 - Reuse of system-level model key -
SoC Test and Verification -> Dense wires snarl verification plans
Dec. 13, 2001 - SoC Test and Verification -> Dense wires snarl verification plans -
SoC Test and Verification -> Leveraging memory for better fault tolerance
Dec. 13, 2001 - SoC Test and Verification -> Leveraging memory for better fault tolerance -
SoC Test and Verification -> Assertions speed processor core verification
Dec. 13, 2001 - SoC Test and Verification -> Assertions speed processor core verification -
Retargeting IP -> Design system compiles silicon straight from C code
Mar. 26, 2001 - Retargeting IP -> Design system compiles silicon straight from C code -
Retargeting IP -> System-in-package option aids reuse
Mar. 26, 2001 - Retargeting IP -> System-in-package option aids reuse -
Reconfiguring Design -> Handel-C backs top-down software development
Feb. 08, 2002 - Reconfiguring Design -> Handel-C backs top-down software development -
Reconfiguring Design -> Reconfigurability: Designer's key strategy
Feb. 08, 2002 - Reconfiguring Design -> Reconfigurability: Designer's key strategy -
Analogue heaven
Feb. 12, 2002 - Analogue heaven
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