Dec. 07, 2011 - At this point, everyone has reported on the merger of OSCI and Accellera, two standards groups that operate in the EDA and IP domain. The principle output from OSCI has been the SystemC language and technologies surrounding it, such as the TLM 2.0 transaction level modeling interface. Accellera has ...

Nov. 18, 2011 - One of the major advances in SoC design methodologies more than a decade ago was the decoupling of the network-on-chip (NoC) from the individual IP cores throughout the SoC. This was (and is) accomplished through the use of carefully specified sockets such as OCP, the old VSIA VCI and (somewhat later) ...

Sep. 27, 2011 - As Moore’s Law continues to drive the semiconductor industry to smaller and faster transistors, 40nm chips are state-of-the-art, 32nm/28nm cores are right around the corner, and companies are now planning their 20nm flows, methodologies, and products. Foundries have been working tirelessly over the ...

Aug. 18, 2011 - One of the great debates of the last ten years in the software world has been the question of Agile Development. Given the growing role of software in an SoC project, it seems fair to ask if Agile techniques could-or should-be applied to the enormous OS porting, driver development, middleware integration, ...

Jan. 03, 2011 - As outlined in a prior post, new advances in formal and multi-engine technology (like Incisive Enterprise Verifier  or "IEV") enables users to do complete verification of design IP using only assertions (i.e. no testbench required!) -- especially for blocks of around 1 million flops or less.  Given ...

Nov. 04, 2010 - Today I'm running a guest article written by Henry Von Bank of Posedge Software, a Cadence Verification Alliance Partner. For some background refer to the interview I did with Henry back in November 2008. Henry has been working on advanced system verification using Incisive Software Extensions (ISX) ...

Aug. 10, 2010 - In my last blog, I gave a few examples of different ways of thinking about getting more work done by finding solutions that increase amount of work accomplished per cycle, instead of just a brute-force approach to the problem. Before I talk about advanced verification solutions, I want to talk about ...

Dec. 16, 2009 - Over the last decade functional verification of ASIC systems has witnessed a paradigm shift in verification methodologies. Until late 90's a verification project requirements were met by traditional test-benches written using a HDL(hardware description language, used for coding the design) or a software ...

Sep. 08, 2009 - Semiconductor Industry is different from the Software Industry in many aspects.Manufacturing, Latest Technological Innovations,Time to Market crisis,understanding the nerve of the customer and speculating the course of technology are few key terms in the Semiconductor Industry, which are different from ...

Aug. 26, 2009 - There is no question we have come a long way in the art of developing chips in the semiconductor business. The number of transistors we are managing to hook up and verify has swelled. The arsenal of tools at our disposal has made substantial advances in the complexity of chips we are able to take to ...

Jul. 16, 2009 - Which are the interesting areas of EDA right now? As a general rule, I think that the answer is "the ends" which today means the architectural level and the transistor layout level. There will always be some interesting areas in between too, of course, but the main flow from RTL to layout along with ...