STMicro readies Bluetooth SoC, VLIW cores

STMicro readies Bluetooth SoC, VLIW cores
By Craig Matsumoto, EE Times
December 14, 2000 (1:54 p.m. EST)
URL: http://www.eetimes.com/story/OEG20001214S0023

SEDONA, Ariz. — Describing two communications-oriented projects, STMicroelectronics Inc. unveiled on Wednesday (Dec. 13) a Bluetooth system-on-a-chip device that will sample next quarter, and an upcoming line of cores that will be the company's first very long instruction word (VLIW) processors.

Both strategies were outlined by ST executives at a briefing held here.

The Bluetooth chip represents a milestone for ST because the company had to craft a new CMOS process to build it. Dubbed RFCMOS8, the process will handle the RF aspects of Bluetooth while allowing the high-density integration normally associated with CMOS, said Patrick Sullivan, vice president of ST's communications business unit (Carrollton, Texas).

"It's very hard to do the RF at that speed and not interfere with the baseband," said Will Strauss, president of research firm Forward Concepts (Tempe, Ariz.). "The baseband's generating its own RF, so the isolation is tough." < P> Often, such devices must emphasize RF performance while sacrificing baseband performance, or vice versa, so ST appears to have found a way to avoid that trade-off, Strauss said.

"They're pretty far along if they're going to sample in Q1," he said.

RFCMOS8 is notable as a pure CMOS process, Strauss said. Wireless communications devices often resort to more expensive gallium arsenide or silicon germanium processes in order to reach required speeds, but the expense of those processes runs counter to the low costs expected of Bluetooth devices.

ST's Bluetooth device is fairly large, at 25 mm², but Sullivan insisted it was developed with low-cost Bluetooth applications in mind. "We expect it to be cost-effective," he said.

In addition to the RF and baseband functions, the device includes an ARM7 processor core and integrated memory. Still unnamed, the part is being designed to comply with both the Class 2 and Class 1 specifications for Bluetooth.

VLIW strategy

Amon g several announcements related to cores, ST officials described the company's first foray into VLIW processors, which will be targeted at specific markets such as video streaming. The work is based on research begun five years ago with Hewlett-Packard Co., but is only now being realized with the advent of six-layer-metal CMOS, which can provide the routing necessary to keep the VLIW engines running at peak capacity, said Greville Commins, director of U.S. micro products operations for ST.

VLIW cores can outshine traditional RISC processors in a number of areas, but ST said it doesn't see VLIW parts fully displacing RISC. In fact, ST said it plans to wield VLIW only for those specific tasks it handles well.

"One of the things that we've recognized is that CPUs are very good at some applications but not very good at others," said Commins. "A dedicated VLIW core may be a good solution to some of these streaming dedicated applications" because of its ability to handle multiple instructions per clock cyc le. he said. But at the same time, the VLIW architecture is weak at interpreting complex "spaghetti" code, Commins said.

To stand out, ST is relying on the customizable nature of its VLIW instruction sets, which can be optimized for particular applications, Commins said. All the intelligence for creating these optimized cores lies at the front end with the compiler, as do certain restrictions. "The compiler only allows you to build up features it can schedule for," Commins said.

But he offered a severe word of caution about this approach: "This means there is no such thing as binary compatibility," he said. "There is a price to pay. The cost benefit is [that you get] really optimized performance for your algorithm."

The company's Lx family of VLIW cores is due to debut in the first quarter of 2001 in the form of the ST200, a low-level chip that contains two multipliers, four integer units, one load/store unit and one branch. The ST200 will allow the company to verify whether its VLIW concepts are sound before moving on to larger chips, Commins said.

A 0.25-micron version of the ST200 will run at 300 MHz, while a 0.18-micron version will run at 400 MHz, he said.