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UMC SILICON SHUTTLE Preparing for Takeoff in 2001
UMC SILICON SHUTTLE® Preparing for Takeoff in 2001SUNNYVALE, Calif, November 20, 2000-UMC (NYSE: UMC), a world leading semiconductor foundry, today announced its Silicon Shuttle® program for 2001, expanding substantially beyond the 2000 program. The Silicon Shuttle program offers customers the opportunity to verify their advanced designs and prototypes in UMC silicon, helping to minimize risks and costs. The new 2001 program provides greater frequency and a richer offering of technologies, including several Silicon Shuttle wafers dedicated to mixed mode and RF CMOS as well as the unparalleled 0.13-micron Worldlogic platform. As before, the mask cost is split among multiple customers by allowing each customer to purchase "seats" on the same mask, reducing individual customer costs to a fraction of the total. Addressing customers' time-to-market considerations, the Silicon Shuttle program will leverage UMC's industry-leading manufacturing cycle times. Silicon Shuttle cycle times in 2001 will be driven on the UMC "hot lot" schedule (approximately one day per photolithography layer), enabling fab manufacturing cycle times of less than four weeks for six-layer metal 0.18-micron wafers. "Customers can now rely on UMC Silicon Shuttle test runs in the same way they have learned to depend on us for delivering their own dedicated engineering lots", stated Peter Chang, CEO of UMC. "This 'hot lot' schedule is a first in the foundry industry and another indication of our commitment to listen and respond to our customers' needs, in this particular instance for rapid and affordable prototyping." New Silicon Shuttle Options for 2001 Several 0.13-micron Worldlogic Silicon Shuttle wafers for logic and mixed mode technology are scheduled in 2001. The WorldLogic platform is generally considered to be the industry's most advanced, with full copper/low-k interconnect technology, coupled with transistor switching delays below 10 picoseconds, enabling microprocessor clock frequencies to exceed 1 Gigahertz. Furthermore, extensive analog options will also be offered on several dedicated 0.13-micron mixed-signal (digital and analog) wafers, enabling true system-on-chip (SOC) functionality. These options include UMC metal-insulator-metal (MIM) capacitors recognized for their outstanding Q-values, low threshold voltage transistors, and copper inductors. "The Silicon Shuttle program opens the door for companies wishing to benefit from the tremendous advantages our 0.13-micron copper/low-k Worldlogic platform is able to bring to their designs," said Jim Kupec, senior vice president of worldwide sales and marketing for UMC. "The shuttle enables 0.13-micron product prototyping to be extremely affordable, making this advanced process more widely available to a broader range of new and existing customers." Several Silicon Shuttle options (low Vt transistors, MIM capacitors, and inductors) are also available for Bluetooth, the fast emerging world standard protocol for connecting wireless peripherals in the consumer and communication spaces. UMC has worked with Bluetooth OEMs and IP creators to develop RF CMOS technologies that will make Bluetooth chips more cost-effective relative to the BiCMOS technology that Bluetooth samples and prototypes are being manufactured by currently. Customers and IP providers may leverage this new technology using the 0.25 and 0.18-micron RF CMOS and mixed-mode Silicon Shuttle wafers. With several million Bluetooth units expected to ship in 2002, verifying Bluetooth designs in silicon at an early stage becomes critical for designers of this advanced wireless technology. About Worldlogic UMC Worldlogic 0.13-micron logic technology, generally considered to be the industry's most advanced, will complete pilot production in December of 2000. The Worldlogic process uses all copper interconnect and is the only technology in the foundry industry with a true "low-k" dielectric (k=2.7) technology, while the rest of the industry is using conventional oxide materials with k values ranging from 3.5-4.0. Low k is important at 0.13-microns to minimize wiring delays associated with parasitic capacitance. This advanced Worldlogic copper/low-k interconnect technology, coupled with transistor switching delays below 10 picoseconds, enables microprocessor clock frequencies exceeding 1 Gigahertz. Furthermore, packing densities of 20 million logic gates per square centimeter of silicon, along with the smallest embedded SRAM bit cell in the foundry industry, provide for the highest functionality per unit area ever in the semiconductor industry. The foundry envisions that their customers' typical 0.13-micron digital product designs may utilize over 5 million logic gates with up to 32Mbits of embedded SRAM on a slice of roughly 1 square centimeter of silicon, entailing over 200 million transistors. By comparison, state-of-the-art microprocessors, such as the Intel Pentium III, utilize about 12 million transistors. About UMC UMC, a world leading semiconductor foundry, operates seven wafer fabs in Taiwan's Hsinchu Science Park. UMC's Japanese subsidiary, Nippon Foundry Inc., has one fab in Japan and UMC's joint venture with Hitachi, Trecenti Technologies, is readying to ramp production in its 300mm fab in Japan. UMC has also started construction on a 300mm facility in Taiwan's Tainan Science Park, with pilot production scheduled to start by third quarter 2001. UMC is a leader in foundry technology, with facilities ramping to reach an annual output of 2.4 million eight-inch equivalent wafers per year in 2000. UMC's joint development program with IBM and Infineon Technologies is progressing with its schedule to introduce the Worldlogic standard 0.13-micron technology this year. UMC serves customers around the world through sales and marketing offices located in the United States, Japan, and the Netherlands. UMC can be found on the web at http://www.umc.com. Note From UMC Concerning Forward-Looking Statements Some of the statements in the foregoing announcement are forward looking within the meaning of the U.S. Federal Securities laws, including statements about future outsourcing, wafer capacity, technologies, business relationships and market conditions. Investors are cautioned that actual events and results could differ materially from these statements as a result of a variety of factors, including conditions in the overall semiconductor market and economy; acceptance and demand for products from UMC; and technological and development risks. Silicon Shuttle is a registered service mark of UMC. Worldlogic and ASICplus are service marks of UMC. Editorial Contacts: In the USA: |
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