Xilinx signs partners to pull cores onto its FPGAs

Xilinx signs partners to pull cores onto its FPGAs
By Craig Matsumoto, EE Times
November 7, 2000 (12:36 p.m. EST)
URL: http://www.eetimes.com/story/OEG20001107S0008

SAN JOSE, Calif. — Continuing its push to make FPGAs suitable for system-on-chip designs, Xilinx Inc. said Monday (Nov. 6) that it will work with four companies to develop software that will let FPGAs incorporate hard intellectual property (IP) cores, a combination that Xilinx calls the platform FPGA.

Other programmable logic vendor are pursuing solutions similar to the platform FPGA. But Wim Roelandts, chief executive officer of Xilinx, said his company's upcoming Virtex II family of FPGAs is best suited for platform design due to a feature called "IP immersion," which allows any part of the FPGA fabric to be removed and replaced with a hard core. The core's performance is guaranteed regardless of its position inside the fabric, Roelandts said. "Without that, a platform FPGA is not possible," he said.

Xilinx had previously formed alliances with a number of companies, including IBM Corp., to support the development of platform FPGAs. The company announced four additional software partnerships this week, with Synopsys Inc., The MathWorks Inc., Mentor Graphics Corp. and Wind River Systems Inc.:

Synopsys will help Xilinx develop a design flow that will allow platform FPGAs to be built from C/C++ system-level descriptions.

The MathWorks and Xilinx will develop co-design and co-verification tools specifically intended to implement DSP functions in platform FPGAs. In a presentation to analysts and the press, Roelandts gave particular attention to the DSP capabilities of Xilinx FPGAs, claiming the company's Virtex II parts can create DSPs running 600 billion multiply-accumulates per second, compared with 4.4 million in the fastest available discrete DSP.

Mentor Graphics will make its Seamless CVE hardware/software co-verification tool available for platform FPGAs.

Fi nally, Wind River will integrate FPGA design and debugging software into its set of embedded development tools.