| Colorado Springs, Colo. — SafeNet Inc. has designed an ARM-based security processor specifically for the small- and midsize enterprise market, allowing the T1/T3 market to move to the same single-chip solution characterized at higher speeds. The 51xx family combines an on-chip 450-MHz ARMv4 processor with an in-line data path engine that performs flow classification, packet filtering and processing of such protocols as Network Address Translation and Internet Protocol Secure (IPsec), said Bill Anderson, marketing manager in SafeNet's embedded division. The packet-forwarding engine, formerly a lookaside engine, has been reimplemented as a full in-line device with dedicated intellectual-property blocks for classification. Its speed has allowed SafeNet to implement three versions of the 51xx family: The 5140 supports bidirectional 45-Mbit/second T3 channels; the 5150 supports bidirectional Fast Ethernet; and the 5160 supports bidirectional 155-Mbit OC-3 lines. The ARM core can handle higher-layer tasks like Transport Layer Security, so that Secure Sockets Layer (SSL) virtual private networks can be implemented with ARM, even as the in-line processor handles IPsec and other protocols. Anderson said the small and midsize business market is demanding very small systems that can simultaneously handle IPsec, firewall, bulk encryption and SSL VPN. Interfaces for the processor include dual GMII, PCI-X, 32-bit DDR DRAM, 32-bit SRAM, I2C, GPIO and USB 2.0 On-the-Go. The three processors are sampling now. SafeNet is also offering evaluation boards, and its QuickSec Unified software as a preintegrated option with chip sets to provide multilayer security applications. | 
