Software limits multi-core ICs, panelists say

Richard Goering, EE Times
(10/25/2005 11:14 PM EDT)

SANTA CLARA, Calif. — Multi-core ICs promise efficiency and performance, but will require new programming models that hide software and hardware details, according to panelists at the GSPx 2005 conference here Tuesday (Oct. 25).

With multi-core ICs, said Daya Nadamuni, chief analyst at Gartner Dataquest, "software is both the problem and the opportunity." She noted that systems-on-chip (SoCs) have not only hardware, but also a hardware/software binding layer, real-time operating system (RTOS), middleware, and applications software. Miss any of these components and you have problems getting to market, she said.

Nadamuni said that SoCs comprised 16 percent of the ASIC market and 31 percent of the ASSP market in 2004, and are expected to show rapid growth. The largest consumer, she said, is the handheld market, with automotive electronics expected to be a growth area in the future. But success depends on managing a "software explosion," she said.

The price of failure can be high, Nadamuni said. In China in 2004, she said, 65 percent of sub-$100 DVD players were returned, many due to software failures.

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