The First Multi-Standard Subsystem with Pre-Verified Video Decoders
ELSTREE, England, February 20, 2006 – ARC International (LSE: ARK), the world leader in configurable CPU/DSP cores and application subsystems, announced today the general availability of the next in its family of multimedia subsystems for embedded system-on-chip (SoC) design. ARC™ Video is a complete pre-verified solution that incorporates H.264, VC-1, MPEG-4, MPEG-2 decoders and industry standard imaging codecs. It is highly efficient for low power applications, and processes any of these decoders at less than 44mW1 for D1 resolutions. Early adopter customers already have licensed the ARC Video Subsystem and are designing it into a range of devices targeting multimedia intensive, portable applications.
“Multimedia is the human perception of DSP and graphics functionality related to sound and vision,” said Will Strauss, founder and president of Forward Concepts. “Critical to designing solutions for the multimedia market are support tools and very low power consumption. ARC’s Video Subsystem provides both with the benefits of SIMD technology. It is an impressive offering for the white hot video market.”
“Portable device manufacturers are increasingly required to integrate high quality multi-format video and image processing into their devices. The ARC Video Subsystem arms developers with a highly optimized multi-standard video solution enabling them to overcome the challenges of developing differentiated multimedia intensive devices without compromising die size, power consumption or video/image quality,” asserted Greg Fawson, president of S2 Data Corporation.
According to Jon Peddie Research (JPR), the demand for H.264 chips in portable solutions could exceed $1 billion in 2006. “H.264, with its higher efficiencies and lower bandwidth demands, will be deployed on a range of mobile devices. Applications include next-generation phones to game machines, DVD players and recorders, and TV delivery systems such as cable, satellite and terrestrial,” said Dr. Peddie, principal at JPR.
The ARC Video Subsystem complements the ARC Sound Subsystem, which was introduced one year ago and has been licensed by a wide range of companies throughout the semiconductor industry. ARC International’s Media Subsystem roadmap will enable SoC designers to include audio-, imaging- and video-intensive capabilities in their chips. It will offer configurable solutions for video encoding, high definition video decode and advanced audio. Each ARC Media Subsystem is a complete product and includes a configurable ARC core, SIMD accelerator, DMA engine, fully integrated hardware, software and development tools. All will operate with any ARC or non-ARC host processor.
“By providing a pre-verified, packaged subsystem ARC is solving a greater portion of customers’ design challenges,” said Derek Meyer, senior vice president of sales and marketing at ARC International. “For the first time, SoC developers can easily add video decode capability into their chip and get to market quickly with little additional design effort. Instead of just licensing technology, ARC is leading the way towards licensing solutions.”
About the ARC™ Video Subsystem
The ARC Video Subsystem is based upon an ARC 700 family core that is coupled with the company’s award winning single instruction multiple data (SIMD) accelerator, which was specifically designed for video and audio processing. A media-centric DMA engine incorporated in the ARC Video Subsystem is highly tuned to efficiently handle multimedia packet transfers. Supported video decoders include H.264, VC-1, MPEG-4 and MPEG-2. Supported imaging codecs include JPEG, MJPEG, GIF, PNG and TIFF.
The ARC Video Subsystem is programmable, enabling the customer to include additional codecs or algorithms. Because it’s based upon an ARC 700 family core, the subsystem can run at up to 533 MHz in a 0.13 micron process, and developers can use the same software development tools that support a 700-class processor.
The ARC SIMD accelerator in the Video Subsystem was developed to exploit data parallelism that is abundant in media applications. A single instruction can compute up to eight separate 16-bit video pixels in parallel through the use of a 128-bit wide data path. ARC’s SIMD accelerator utilizes in excess of 100 new vector instructions that were specifically selected to accelerate algorithms commonly used in video and imaging applications, such as discrete cosine transforms and filters. It is directly coupled with the configurable 700 family core in the subsystem, and is more efficient than using a fixed core with a bus-connected hardwired co-processor.
H.264 (D1)
Speed: 166 MHz
Power: 44 mW
Area: 260K gates
MPEG-4 (D1)
Speed: 135 MHz
Power: 36 mW
Area: 260K gates
Speed and Power numbers quoted are for a TSMC G 0.13 micron process and include memories. Metrics for other video, audio and imaging codecs are available at www.ARC.com
Area number quoted is for a TSMC G 0.13 micron process and excludes memories.
Availability
The ARC Video Subsystem is available now for licensing.
About ARC International plc
ARC International is the world leader in low-power, high-performance 32-bit configurable CPU/DSP processor cores, subsystems, real-time operating systems and development tools for embedded system design. ARC’s patented configurable CPU technology assists customers in the development of next generation digital media, consumer and communications devices, resulting in lower cost, higher performance SoC products.
ARC International maintains a worldwide presence with corporate offices in San Jose, California, USA and Elstree, UK. The company has research and development offices located in England and the United States. For more information please visit the ARC website at:
www.ARC.com. ARC International is listed on the London Stock Exchange as ARC International plc (LSE: ARK).
