Evatronix Adds IP-XACT Assured XML Meta-data to USB Cores Range

Update: Cadence Completes Acquisition of Evatronix IP Business (Jun 13, 2013)

Evatronix announces membership to The SPIRIT Consortium

Gliwice & Bielsko-Biala, Poland -- July 26, 2006 – Evatronix S.A., the silicon Intellectual Property (IP) provider, has announced that it now delivers IP-XACT™ assured XML meta-data for its range of USBHS-OTG-MPD IP cores.

The XML-based format, as defined by the IP-XACT specification (v1.2) from The SPIRIT Consortium, is used for automated integration techniques, and contains a detailed description of the IP interface and memory map allowing users to manage internal and external IP libraries in a consistent way. By adhering to the The SPIRIT Consortium meta-data formats and semantics, this allows Evatronix to create a full IP-XACT-enabled environment through automatic integration of its IP cores into multiple IP-XACT assured tools which provide the capability to rapidly create a whole platform by automating several tedious tasks, usually realized manually or by limited scripts.

“Increasingly our customers are designing at the most complex level and require IP cores that support the IP-XACT specifications,” said Wojciech Sakowski, Evatronix president and chief strategy officer. “By joining The SPIRIT Consortium, we will have advanced access to new specifications of these standards for future R&D development.  In this way we can offer improved support for our customers by providing them with the IP-XACT compatible XML meta-data, along with the RTL source code and other deliverables at the earliest opportunity. This will speed-up and simplify the integration of our cores into the customers’ SoCs.”

“The SPIRIT Consortium is pleased add new IP producer to its membership roster,” said Ralph von Vignau, chairman of the SPIRIT Consortium. ”We look forward to enaging with Evatronix on the evolving IP-XACT specifications, and receiving valuable proof-of-concept feedback based on deployment of IP-XACT within Evatronix IP projects.”

Support for IP-XACT specifications across other Evatronix cores will be announced later this year. Evatronix is currently developing a SystemC transactional model of the USBHS-OTG-MPD IP core. The next release of IP-XACT with ESL Extensions due in Q4 2006 will target TLM and mixed-level designs to enable the real re-use of IP components at multiple levels of abstraction. Evatronix intends to adopt these new standards and create the XML meta-data description for the TLM IP.

About the USBHS-OTG- MPD IP core

The Evatronix USBHS-OTG-MPD is the third OTG core in the company’s portfolio, and incorporates many advanced features such as latency buffers and protocol aware DMA. The organization of the buffers, using system memory as endpoint storage location, significantly reduces the size of expensive on-chip memory and allows users to optimize memory resources management according to the needs of the system. The endpoint data is transmitted to/from system memory on USB core demand by built-in protocol aware DMA. The USBHS-OTG-MPD has been certified at the USB-IF Compliance Workshop earlier this year. The core proved its compatibility with OTG transceivers from various vendors.