Stratix II GX FPGAs Meet Rigorous CEI-6G-LR/SR Specifications

San Jose, Calif., March 13, 2007—Altera Corporation (NASDAQ: ALTR) has successfully completed characterization of its Stratix^® II GX FPGA family for the Optical Internetworking Forums (OIFs) Common Electrical Interface 6 Gbps Long Reach and Short Reach (CEI-6G-LR/SR) specifications, the company announced today. Meeting this rigorous protocol exemplifies the robustness of the Stratix II GX transceivers and their ability to deliver 127 Gbits of aggregate bandwidth for high-speed chip-to-chip and backplane applications.

The CEI-6G specification provides a framework of electrical standards allowing for interoperability of devices and systems. Stratix II GX FPGAs are the industry’s first family to support the rigorous standard in the full CEI specification range of 4.9 Gbps to 6.0 Gbps and provide design margin to stringent jitter specifications, even when multiple lanes are active. In addition to CEI-6G, Altera’s Stratix II GX FPGAs provide performance margin for, and have demonstrated compliance with, the OC48/STM16, OC12/STM4, PCI Express, Gigabit Ethernet, XAUI and Fibre Channel standards.

“Altera’s high-performance transceiver technology enables the Stratix II GX family to be the industry’s first FPGA to comply with the stringent requirements of the CEI-6G specifications. We are unique in our capability to demonstrate performance margin in a number of stringent protocols, including CEI-6G, while providing FPGAs with the lowest-power and highest-density transceivers in production today,” said David Greenfield, senior director of product marketing for high-end FPGAs at Altera. “Customers can design with confidence for 6-Gbps performance with the robust performance margins we are seeing in Stratix II GX production silicon.”

For more information about Stratix II GX FPGAs, visit www.altera.com/stratix2gx.

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