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Impinj First and Only Provider of One-Time- and Multiple-Time-Programmable Nonvolatile Memory Cores in 90-nanometer Logic CMOS
SEATTLE, Wash., April 5, 2007 -- Leading logic nonvolatile memory (NVM) intellectual property (IP) supplier, Impinj, Inc., today announced the availability of the company’s AEON®/OTP nonvolatile memory (NVM) cores in the 90-nanometer manufacturing process at Taiwan Semiconductor Manufacturing Corporation (TSMC), making Impinj the first and only provider of one-time- and multiple-time-programmable (OTP and MTP) NVM cores in advanced logic CMOS processes.
Impinj’s AEON NVM cores enable the integration of both high-density OTP NVM and MTP NVM into system-chips for greater design flexibility and performance. Leveraging Impinj’s proprietary floating-gate technology, AEON NVM cores provide an alternative to costly embedded Flash memory and cumbersome off-chip EEPROM. “As semiconductor companies seek new ways to control costs and improve development cycles, they are focusing on critical success factors such as the use of high-quality, third-party IP for advanced SoCs,” said Larry Morrell, vice president of IP Products at Impinj. “As a supplier of both an OTP product optimized for firmware storage applications and MTP products designed for calibration and configuration storage, Impinj provides the broadest range of system design options in advanced, low-power CMOS processes.” Embedded in more than 300 million chips worldwide, Impinj’s AEON NVM cores retain crucial system information even in powered-off electrical devices, such as cell phones, where multiple applications for NVM exist and where market size should exceed one billion units in 2007, according to a recent iSupply report. In addition, Impinj’s AEON/MTP products reduce system power, cost, and size, for power management, wireless, and USB applications by embedding configuration data, device or vendor identification information, and two-way handshake IDs. AEON/OTP provides higher density memory suitable for firmware storage and mask ROM replacement that increases the flexibility and configurability of the design. AEON/OTP and AEON/MTP architectures are compatible with standard logic CMOS processing with no additional masks or process steps needed, support 10-year data retention, and include all required high voltage circuitry within the core. AEON/MTP supports 8 bits to 8k bits and features up to 15,000 write/erase cycles as well as selectable word-width capabilities. Available in configurations of up to 256k bits, AEON/OTP features advanced testability that supports complete testing of the core circuitry without the need for costly UV-erase functions. Leveraging deep semiconductor design and process expertise, Impinj’s NVM cores demonstrate the highest levels of performance, reliability, and ease of integration for customers. Impinj NVM cores undergo stringent and well-documented quality, performance, and manufacturability testing, and are available at the world's leading foundries at 0.25 µm, 0.18 µm, 0.13 µm, and 90 nm technology nodes. To request datasheets and additional information on Impinj’s AEON logic nonvolatile memory, please visit www.ip-support.impinj.com For information about Impinj’s “Try It Now,” six-month, free, IP evaluation program, visit www.impinj.com/tryitnow About Impinj, Inc.
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