Lightspeed Logic Introduces Reconfigurable Logic for TSMC 90nm with ARM Standard Cell Libraries

Reconfigurable Logic with Breakthrough 80% Density of Standard Cell Enables Flexibility in High Volume SOC and ASSP Designs

SANTA CLARA, Calif. -- May 9, 2007 -- Lightspeed Logic, the leading provider of mask reconfigurable IP and a member of the ARM Connected Community, today announced immediate availability of the LTA90, a standard cell based reconfigurable logic IP for TSMC's 90 nanometer (nm) G, LP, and GT logic processes. The 90nm standard tile and library are based on pre-characterized, pre-qualified ARM® standard cell libraries, part of its family of Artisan® physical IP, and are approved for use by any ARM authorized customer using TSMC as a foundry. Lightspeed Logic's Reconfigurable Logic IP significantly reduces design cost and speeds time-to-market for families of SoC or ASSP devices. Customer usage includes such high volume markets as image processing, hand-held consumer, and flat panel TV.

"Lightspeed Logic's new TSMC 90nm ARM standard cell-based reconfigurable logic solution provides SoC and ASSP chip designers with flexible and scalable IP built upon the industry's leading standard cell library for the industry's most popular foundry," said Dave Holt, President and CEO of Lightspeed Logic. "Chip designers get the quality, performance and low-risk profile of an ARM standard cell solution in a mask-reconfigurable format utilizing their existing tool flow. This provides superior density and performance for high-volume chip families at much lower design cost and in shorter design times than can be accomplished with traditional methodologies."

Lightspeed Logic's Reconfigurable Logic delivers a density and performance breakthrough for mask reconfigurable solutions, achieving 80% the density of traditional methodologies for multi-million gate logic blocks, twice the density of competing mask reconfigurable solutions.

About the LTA90

The LTA90 is available for design blocks ranging from 50K gates to 5M gates. The LTA90 also offers designers the flexibility to choose the number of mask layers to be used for customization on a device-by-device basis, without change to the underlying logic array. Typical customization usage models range from 2 to 6 metal/via mask pairs. The LTA90 supports speeds up to 300MHz for 25 levels of logic.

The 90nm product is an addition to Lightspeed Logic's LTA130, a 130nm tile-based reconfigurable logic for TSMC processes that also uses ARM standard cells.

About the ARM Connected Community

The ARM Connected Community is a global network of companies aligned to provide a complete solution, from design to manufacture and end use, for products based on the ARM architecture. ARM offers a variety of resources to Community members, including promotional programs and peer-networking opportunities that enable a variety of ARM Partners to come together to provide end-to-end customer solutions. For more information, please visit http://www.arm.com/community.

About Lightspeed Logic

Lightspeed Logic is a provider of mask reconfigurable intellectual property (IP), a digital logic implementation technology that provides time-to-market, yield, manufacturability, and development expense advantages over standard-cell implementation. Founded in 1996, Lightspeed Logic has developed and brought to market four mask-reconfigurable architectures, the most recent of which is a regular logic structure available for multiple foundries, IDMs and process nodes. The company is currently working with customers at the 150, 90, 65, and 45 nm process nodes. Lightspeed Logic's corporate headquarters are in Santa Clara, CA. You can find more information on Lightspeed Logic at www.lightspeed.com.