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Atmos releases super-fast EDA tool for embedded DRAM
Atmos releases super-fast EDA tool for embedded DRAM KANATA, Ontario--Atmos Corp. here today announced an electronic design automation (EDA) tool that it said can create embedded DRAM in a matter of minutes, not months or even hours. Atmos, which started life as an engineering services company but has lately turned to producing software and intellectual property, is pushing to produce what it calls SoC-RAM, which combines the speed of traditional SRAM with the small size, low power consumption and density of DRAM on one chip. The Canadian company is reacting to the demand for ever-higher memory densities, lower power, higher bandwidth and shorter time-to-market, said Atmos' president, C. Paul Slaby. "We realized early on that the speed of your embedded DRAM wouldn't matter if it is six months late to market," said Slaby. "So we set out to not only produce the world's fastest eDRAM, but to also come up with a process that gets the product to market very quickly." Atmos' embedded DRAM (eDRAM) IP is already available on Taiwan Semiconductor Manufacturing Co.'s 0.18-micron logic and DRAM process. The new Atmos EDA tool was co-developed with Ottawa-based chip maker Mosaid Corp. (see Dec. 6, 1999 story). The 0.18-micron DRAM Macrocell Compiler uses hand-crafted leaf cells for maximum density and performance in merged logic-DRAM technology. It can accommodate memory sizes from 96 kilobits to 32 megabits, which can be further tiled to 128 megabits. Word sizes range from 24 to as required in 1-bit steps. Power consumption is 1.8 volts, with less than 14-nanosecond row access time and less than 5-ns column access time. "This compiler will also allow our clients to conduct on-line simulations using various configurations in advance of their purchase," Slaby said. "It enables them, for example, to find the necessary balance of things such as speed, size and configuration before they commit to production."
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