ChipVision Delivers Two Breakthrough ESL Power-Optimization Design Tools for Meeting Critical Power Budgets

PowerOpt(TM) Reduces Energy Needs in Critical Semiconductor Blocks by up to 75 Percent and Achieves Results 3x Faster Than Lower-Level Methods; P-SAM Framework Analyzes Power Consumption in System Design Alternatives for Optimal Power Management Strategy

OLDENBURG, Germany & SAN JOSE, Calif. OLDENBURG, Germany & SAN JOSE, Calif.-- April 22, 2008 -- ChipVision Design Systems, the low-power specialist in electronic design automation (EDA), today announced two breakthrough products – PowerOpt™ and P-SAM – that help companies meet their power budget requirements early in the design cycle. The new tools are ideal for companies developing mobile communications, networking, consumer or automotive applications that need extended battery life or reduced cooling requirements. ChipVision will demonstrate both products in Booth #2334 at the Design Automation Conference, June 8-13, 2008, in Anaheim, Calif.

PowerOpt, a patented Electronic System Level (ESL) power optimization design tool built on ChipVision’s unique ORINOCO™ power analysis technology, lets RTL and system designers work interactively with system-level descriptions written in ANSI-C, SystemC and C++, exploring and visualizing critical tradeoffs in timing, area and power. It then implements their choices to generate power-optimized Register Transfer Level (RTL) code with up to three times lower power consumption than RTL flows, at triple the speed, due to code compactness at the system-level compared to RTL.

ChipVision’s new P-SAM framework – short for Power Simulation, Analysis and Modeling – lets system architects for the first time investigate design alternatives at the system level, quickly devise effective power management strategies, and verify whether power targets are met. It also lets software developers analyze the impact of source code changes on expected power consumption in their choice of virtual platform simulation environment without relying on time-consuming lower-level architectural analysis techniques or emulator runs.

Thomas Blaesi, chief executive officer of ChipVision, said, “Companies we’ve spoken with and those we are actively engaged with have validated that energy dissipation is a vital part of their optimization flow – especially for mobile and wireless applications. With PowerOpt, they can reduce pre-RTL energy needs by up to 75 percent, get power-optimized RTL 60 times faster than with lower-level methods, making development far more cost-effective and less risky. And P-SAM lets them efficiently investigate multiple system design alternatives to formulate the best power management strategies and ensure their power targets are met. We are pleased to help companies realize substantial savings by evaluating performance, area and power tradeoffs early – at the architectural level rather than the gate level – and truly optimize their power management, in ways never before possible.”

PowerOpt Closes System-Level/RTL Gap

PowerOpt performs synthesis, analysis and estimation, and generates RTL code automatically, bridging the gap from specification at the system level to implementation at the RT level. Once the source code is imported, PowerOpt generates the pre-implementation activity profile needed for dynamic power analysis. Next, users interactively control power (dynamic and leakage), area, and timing trade-offs to achieve optimized synthesizable Verilog code the RTL design team can modify according to its requirements. PowerOpt outputs constraints in Common Power Format (CPF) and Unified Power Format (UPF). It also uses technology-driven modeling for process, temperature, and voltage variations.

P-SAM Enables ESL Power Analysis

The P-SAM analysis framework offers system-level designers and software developers a standards-based API for source code instrumentation, and comprehensive analysis tools for design descriptions in SystemC or pure C/C++. It enables early system-level power analysis based on system-level simulation; system architectural trade-off analyses such as IP selection and partitioning are performed quickly and accurately, and real application software is run on the system. Developers gain dynamic visibility into the power consumed across the peripherals, interconnect, processor and memory of a virtual SoC platform. Working interactively, they perform architectural, software and power tradeoff analysis at a level not typically possible with other approaches. They are able to investigate different bus topologies, compare power consumption of IP blocks, identify hotspots, and explore other system areas to hone their power management strategies and verify these are met. P-SAM also can be integrated into commercially available virtual platforms.

Pricing and Availability

Both PowerOpt and P-SAM are available now, with PowerOpt priced at USD $450,000 for a three-year, time-based license. P-SAM pricing varies depending on the structure of the SOC.

About ChipVision Design Systems

ChipVision Design Systems is the leading supplier of low-power system-level EDA software tools and services. Its patented software enables semiconductor developers to estimate and optimize energy dissipation in critical blocks of their design; the software interactively creates RTL code optimized for power, performance and area. This electronic system-level (ESL) approach results in significant energy and time savings. The company’s solutions are based on open industry standards including SystemC. ChipVision is headquartered in Oldenburg, Germany, and has offices in Munich and San Jose, Calif. For more information about ChipVision, its products and services, visit www.chipvision.com.