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Alcatel to use STMicro DSP core in SoC designs
Alcatel to use STMicro DSP core in SoC designs BRUSSELS--( ChipWire) Alcatel Microelectronics here has selected the ST100 digital signal processor from STMicroelectronics as its preferred programmable DSP core for use in high-performance applications. Alcatel Microelectronics said it will use the ST100 DSP to design system-on-a-chip (SoC) solutions for communications applications such as digital subscriber line (DSL) and voice-over-Internet protocol (VoIP) networks. Alcatel has also licensed a number of ARM cores from ARM Ltd. for SoC designs. "With the ST100 Alcatel will be able to develop high-performance embedded systems as required in GSM, xDSL and VoIP applications," said Johan Danneels, chief executive officer and chairman of Alcatel Microelectronics. "These will enable Alcatel to maintain a leading edge in its core markets." To complement the company-wide policy to use the ST100 DSP core, Alcatel is launching a platf orm-based design initiative around the ST100 and embedded microcontroller cores. The initiative is intended to allow rapid reuse of both hardware and software components and quick development of derivative designs. Alcatel said it is aiming to reduce SoC design time by 90%. "This new agreement continues and reinforces the long and fruitful cooperation between Alcatel and STMicroelectronics in wireless, xDSL and other communications segments," said Aldo Romano, general manager of the telecommunications, peripheral and automotive groups at STMicroelectronics. Although Alcatel Microelectronics manufactures silicon chips, many of its advanced digital chips are manufactured at third-party foundries. It is not clear whether the deal with ST will allow Alcatel Microelectronics to take its designs to any foundry or if it must use STMicroelectronics for DSP-based chip manufacture, or is a combination of those two approaches. The ST100 is a fixed-point very long instruction word DSP core that includes 16 -bit instructions for code compactness in control functions, 32-bit instructions for faster microcontroller performance and 128-bit VLIW instructions for high-end DSP performance. ST said the first implementation of the ST100 architecture, the ST120, includes five functional units that can deliver up to 200 million multiply-accumulate (MAC) operations per second at 1 volt and up to 600 million MAC operations per second at 1.8 V.
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