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ARM Demonstrates Complete Solution for SOC Backplane Design with Fabric and Verification IPOctober 6, 2008 -- ARM will demonstrate its innovative range of complementary AMBA® protocol-based fabric and verification IP solutions for the design and analysis of complex system-on-chip (SoC) at its annual Developers’ Conference. Demos will highlight how ARM Adaptive Verification IP (AVIP) – an innovative technology for extracting and applying traffic profile information to verify the performance of an entire SoC – can be used with ARM Fabric IP for AMBA protocol-based SoC platform exploration, performance and functional verification. Visitors will be able to see how ARM AVIP can be used for architecture optimization and functional verification in the context of the development of an AMBA 3 AXI™ protocol-based networking SoC. Optimization of the SoC backplane architecture is demonstrated by simulating the Fabric RTL subsystem with Adaptive Verification components; AVIP master and slave components are used as statistical traffic generators in lieu of real IP, while AVIP Monitors profile the system traffic and analyze performance. Fast and comprehensive functional verification of an AXI slave interface is also demonstrated using AVIP profiled constrained random generation capability in conjunction with ARM’s defined AXI protocol checker and functional coverage points. The AVIP demo also gives visitors the opportunity to view in simulation advanced ARM Fabric PrimeCells® such as the PrimeCell interconnect and dynamic and static memory controllers, and to see how a complex AMBA 3 AXI protocol-based system can be quickly assembled in AMBA Designer. WHEN: Tuesday - Thursday, October 7-9, 2008 HOW: For free press and analyst registration, please visit: http://www.rtcgroup.com/arm/2008/registration/press-registration.php
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