Lattice Semiconductor Reports First Quarter Financial Results

HILLSBORO, OR – APRIL 23, 2009 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced financial results for the first quarter ended April 4, 2009.

For the first quarter, revenue was $43.3 million, a decrease of 13% from the $50.0 million reported in the prior quarter, and a decrease of 23% from the $56.6 million reported in the same quarter a year ago.

FPGA revenue for the first quarter was $15.5 million, up 9 percent from the $14.3 million reported in the prior quarter, and up 14% from the $13.7 million reported in the same quarter a year ago. PLD revenue for the first quarter was $27.8 million, down 22% from the $35.7 million reported in the prior quarter, and down 35% from the $42.9 million reported in the same quarter a year ago.

Other (expense) income, net, for the first quarter was an expense of $0.5 million compared to an expense of $7.6 million reported in the prior quarter and income of $1.3 million reported in the same quarter a year ago. Other expense included an impairment charge of $0.7 million in the first quarter of 2009 compared to $8.0 million in the fourth quarter of 2008, related to an other-than-temporary decline in fair value of auction rate securities held in Long-term marketable securities.

Net loss for the first quarter was $5.8 million ($0.05 per share), compared to a prior quarter net loss of $14.4 million ($0.12 per share) and a net loss of $3.3 million ($0.03 per share) reported in the same quarter a year ago. These results include intangible asset amortization charges, stock-based compensation expense, restructuring charges and, for the first quarter of fiscal 2009 and fourth quarter of fiscal 2008, an impairment charge on marketable securities. Excluding these items, non-GAAP net loss for the first quarter of 2009 was $3.6 million ($0.03 per share) compared to non-GAAP net loss of $3.7 million ($0.03 per share) for the fourth quarter of 2008 and non-GAAP net income of $1.4 million ($0.01 per share) for the same quarter a year ago.

Bruno Guilmart, Lattice's President and CEO, commented, "In the past quarter we saw strong gains in the Chinese telecom market and our new products actually grew quarter on quarter. However, consistent with the global economic downturn, the balance of our business experienced continued weakness. Despite the drop in revenue and our lack of profitability we did, through careful management, generate $7.5 million of cash from operations. Profitability is still our highest priority and we continue to work on lowering our cost structure. This includes reducing cost out of our supply chain and examining the cost and location of resources we employ compared to the needs of our customers."

Michael G. Potter, Lattice's Corporate Vice President and Chief Financial Officer, added, "I am pleased that we reduced operating expenses 14.8% compared to the same quarter a year before as a result of our 2008 restructuring plan, but as Bruno indicated we will continue to look for and execute on opportunities to further improve our cost structure. In addition, we ended the quarter with $71.4 million of cash and cash equivalents, $60.0 million of other receivables from Fujitsu of which $30.0 million was received shortly after quarter-end and no long term debt. We expect to receive the remaining $30.0 million of other receivables in the fourth quarter of 2009. We believe that our balance sheet will allow us to continue investing and providing our customers with innovative solutions." First Quarter Business Highlights

• Lattice launched the mid-range LatticeECP3 FPGA family that extends the LatticeECP2M's value proposition of deep memories, powerful DSP blocks and high data rate SerDes in an economical package by further accommodating the market's demand for low power devices. The ECP3 is the lowest power SerDes-enabled FPGA in production today. The ECP3 targets wireless and wireline applications, and also PCI Express and broadcast video.
• Lattice introduced the mixed-signal ispClock5400D, an ultra-low noise clock distribution chip. The 5400D permits overall cost reduction by enabling use of low cost CMOS oscillators instead of the expensive crystal oscillators that are traditionally needed by high performance communications and computing applications.
• Lattice also re-emphasized our MachXO PLD family through stronger distributor partnerships and the release of a new low cost evaluation kit designed to encourage rapid adoption. Since the MachXO's introduction we have shipped over 15 million devices. The MachXO is a highly versatile programmable logic solution for those who need a low-density non-volatile device for general purpose I/O expansion, interface bridging and power-up management functions. Designed for a broad range of applications, the MachXO is used in a variety of end markets including consumer, automotive, communications, computing, industrial and medical.

Business Outlook - June 2009 Quarter

• Revenue is expected to be plus or minus 5% on a sequential basis
• Gross margin percentage is expected to be approximately 50% to 52% of revenue which includes the estimated effect of costs incurred to restructure our distribution channels in the Greater China region
• Total operating expenses are expected to be approximately $27.0 million

Financial tables

• Consolidated Financial Statements Q1 2009
• Supplemental Historical Financial Information Q1 2009

About Lattice Semiconductor

Lattice is the source for innovative FPGA, PLD and Mixed Signal programmable logic solutions. For more information, visit www.latticesemi.com