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NEC spins cores targeting high-definition television
NEC spins cores targeting high-definition television NEC Electronics Inc. (Santa Clara, Calif.) has unveiled five internally developed macros targeted for HDTV: a color-space converter, digital video interface, variable-length decoder, video de-interlacer and video x-y scaler. The company said all the cores are supported by NEC's 0.25-micron cell-based ASIC process technology, but plans are afoot to add the cores to NEC's 0.18- and 0.15-micron processes. The color-space converter is designed for set-top boxes, PC-TV cards, digital TV receivers, digital cable-TV receivers and professional DTV equipment. The core supports clock rates up to 150 MHz as well as contrast and brightness adjustment of the input video. According to NEC, it also supports 8- or 10-bit input and is capable of independently generating either 8- or 10-bit output. The digital video interface core, meanwhile, targets graphics and video-controller chips for digital video. It accepts digital video from either a vid eo interface port or a generic video bus carrying sync and video data. The core generates properly timed video data, sync signals and memory addresses to store the video in a frame buffer, NEC said. Users can program its output addresses with a start address and line pitch. It runs at speeds up to 150 MHz. NEC's variable-length decoder forms the front end of an Advanced Television Systems Committee (ATSC) or MPEG-2 decoder. According to the company, the core performs full variable-length decoding of ISO/IEC 13818-2 streams. Inputs are CMOS-compatible data and clock, while outputs are fixed-length tokens to be processed by other components. The core supports bit rates up to 270 MHz. The video de-interlacer converts interlaced video content in apps ranging from PC-TV cards to wide-screen projectors. The company said this core processes video spanning a range of input and output resolutions, from 8-bit color, standard-definition TV to 10-bit color HDTV. Visit www.necel.com.
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