Duet goes 'royalty-free'; Lucent adds cores

Duet goes 'royalty-free'; Lucent adds cores
By Richard Goering, EE Times
February 16, 1999 (12:34 p.m. EST)
URL: http://www.eetimes.com/story/OEG19990216S0019

Richard Goering Bringing a new business model to the physical-library market, Duet Technologies (San Jose, Calif.) has announced "royalty-free" cell libraries, I/Os, SRAM controllers, and ROM and FIFO compilers. Customer-owned tooling (COT) users-that is, companies with their own layout capability-can license these products for a one-time fee, then negotiate better prices with foundries, which thereby avoid the royalty costs that come with "free" physical libraries, the company said.

A COT customer can buy a perpetual site license for any combination of three products-standard cells, I/Os or memory compilers-for a given foundry process for $25,000. Each additional product for the same silicon process is an extra $5,000. Customer-specific customization is available at an additional cost. Products are offered for Chartered, IBM, TSMC and UMC's 0.25 - and 0.35-micron processes, in addition to TSMC's 0.5-micron process. Library products for 0.18-micron processes will be available in the first quarter, Duet said.

According to Prabhu Goel, Duet's president and chief executive officer, a foundry's silicon royalty fee for an average medium-volume design can be as high as several hundred thousand dollars per year per design. With the royalty-free model, he said, customers can potentially negotiate a better wafer price because of the foundry's lower costs. Library evaluation kits and purchases will be available from Duet's Web site at www.duettech.com starting April 1.

Lucent Technologies' Microelectronics Group (Allentown, Pa.) has become the latest FPGA vendor to offer a program for third-party intellectual-property cores. Called Orca Core Alliance, the program seeks to develop a portfolio of cores for Lucent's Orca FPGA product line.

The alliance will focus on such areas as networking, signal p rocessing, RISC microprocessors, microcontrollers and memory controllers. Partners will typically provide cores in VHDL or Verilog source code. Designers will license the cores directly from alliance partners.

The first member of the Orca Core Alliance is Modelware, which has been offering ATM cores for Lucent since 1997. Modelware will add updated Utopia master and slave cores, a Utopia slave bridge, Utopia muxes, an OC-12 buffer and an HDLC controller as well as ATM physical-layer and RM cell manager cores. See www.modelware.com.

Also joining the program are Integrated Silicon Systems (www.iss-dsp.com), Silicore www.silicore.net) and Logic Design Solutions (logic-design-solutions.com). Details are at www.lucent.com/orca/orcacore/core_alliance.html.

Claiming to offer the most area-efficient produ cts of their type, Mentor Graphics Corp. has announced a suite of high-performance memory generators. The Memory-Plus Libraries-based on Mentor's Memory Builder and Memory Model Builder products-are parameterized, SRAM and DPRAM generators for deep-submicron applications. The SRAM design claims performance of greater than 700 MHz at 0.25 micron. See www.mentorg.com.