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Software Developers Get New High Performance Computing C-to-FPGA ToolsImpulse C Support Enhanced for DRC’s Accelium, Xilinx-Based Acceleration Cards KIRKLAND, Wash.-- May 11, 2010 --DRC Computer and Impulse Accelerated Technologies today announced that the Impulse C™-to-FPGA tools have been integrated with the DRC Accelium™ coprocessor card, enabling software engineers to fully access hardware acceleration using familiar C programming methods. This integration provides C-language control of I/O, memory, streams and signals at the hardware level, allowing applications to leverage the high parallelism possible in FPGAs for higher performance. FPGAs are recognized as powerful accelerators for non-sequential algorithms, and have been successfully deployed by engineering teams ranging from defense and aerospace, including NASA, to financial computing. For complex, highly algorithmic applications, automated tools such as Impulse C improve programming productivity. Using the Impulse tools, applications written in C can be implemented as multiple streaming processes in FPGAs. Using the DRC Computer Accelium coprocessor card, application performance and throughput can increase by 10X, 100X, or more. Typical applications include image analysis, data mining and encryption. “We are happy to see our technology made more accessible to software developers,” said Lawrence Laurich, President of DRC. “The work Impulse has done to abstract away the low-level hardware details, plus their ability to automatically parallelize C code, has brought hardware capability to the much larger population of software developers.” “The DRC Accelium platform integrates many of the components our software-oriented users need to deploy dozens to thousands of accelerated systems,” said Brian Durwood, CEO of Impulse. “By providing a well-integrated, tested and expandable platform to industry, DRC takes much of the risk out of high performance computing.” The integration is the work of Synective Labs, a long-standing partner to DRC and Impulse, specializing in hardware acceleration solutions. The Synective team developed robust links from ANSI C to all the key hardware features of the DRC boards. This enables DRC users to write or import C code and compile all the way to hardware, without having to become hardware experts. Also, since most of the code is abstracted from hardware, design and test code can be easily retargeted to new platforms. Software/hardware teams interested in accelerating C code on FPGAs should contact www.ImpulseC.com, www.DRCComputer.com or www.Synective.se.
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