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Dolphin Integration's Panoply of Memories and Standard Cell Libraries for easing the fabrication capacity shortageMeylan, France – August 27, 2010. The release of the SESAME Reduced Cell Stem Library uHD-BTF rel 1.2 complements the already celebrated Dolphin Integration’s High Density and Low Power optimized Panoply of Silicon IPs. Embedding instances of the Pluton architecture for single port RAM and of the Cassiopeia architecture for double metal programmable ROM, plus a logic block designed with the uHD-BTF library leads to a SoC density increased by up to 20%. Are you puzzled about the achievement of such performance? Please have a look at the brochure http://www.design-reuse.com/sip/view.php?id=23830 and surf the TSMC website: Dolphin Integration is promoted as the provider for the highest density and lowest power libraries for TSMC 180 nm on TSMC’s catalog! To gain access to evaluation material, contact directly the product manager at ragtime@dolphin.fr About Dolphin Integration Dolphin Integration is up to their charter as the most adaptive creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, resilient to noise and drastic for low power-consumption, together with engineering assistance and product evolutions customized to their needs. For more information about Dolphin, visit: www.dolphin.fr/ragtime
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