|
||||||||||||
Dongbu HiTek licenses EnSilica's eSi-RISC processor coresWokingham, UK – 27th January 2011. EnSilica, a leading independent provider of front-end IC design services, has announced that Korea’s Dongbu HiTek has licensed the eSi-1600, part of its eSi-RISC family of embedded processor cores. “The eSi-1600 provides a highly optimised solution with both very low gate and cycle counts. The fully integrated processor sub-system, including memories, peripherals and timers, will greatly reduce design and verification time. Furthermore, EnSilica’s flexible licensing model makes the use of eSi-RISC very attractive for cost-sensitive, high volume designs,” said Jinseok Koh, Director of Dongbu HiTek.
Dongbu HiTek, a world leader specialty foundry, chose EnSilica’s eSi-1600 on a cost/performance basis following extensive evaluation against other established, small footprint embedded RISC processors targeted at mixed-signal and SoC applications. Dongbu HiTek’s evaluation benchmarks, which were undertaken using actual application code, showed that EnSilica’s eSi-1600 had a 20% lower gate count than the competition. With the addition of a single custom instruction, which resulted in only a negligible increase in gate count, it was also 36% faster. Additionally, the custom instruction reduced the eSi-1600’s code size, resulting in lower total memory usage. "Dongbu HiTek's decision to adopt the eSi-RISC architecture is yet further evidence that, where cost/performance is important, it has the ability to deliver even against the toughest competition," said Ian Lankshear, Managing Director of EnSilica. "Dongbu HiTek's evaluation of the eSi-1600 truly exemplifies its value proposition in delivering exceptional performance." EnSilica’s eSi-RISC family provides a range of high quality, highly configurable embedded processors that are easy to integrate. The processor subsystem is delivered fully targeted to the customer ASIC technology, thereby reducing the integration effort. eSi-RISC processors provide the flexibility to define a range of hardware functions to optimise the silicon area. On–chip memory requirements are reduced through inter-mixed 16-bit and 32-bit instructions, resulting in good code density without compromising performance. It is the only processor scalable from 16-bits to 32-bits, starting from as low as 8.5k gates. eSi-RISC utilises the industry standard GNU optimising C/C++ compiler and Eclipse IDE for rapid software development, and supports efficient debugging on the target through a JTAG interface and hardware breakpoints. The development suite is common to both 16-bit and 32-bit processors, protecting users’ software investment. About EnSilica EnSilica is an established company with many years experience providing high quality IC design services to customers undertaking FPGA and ASIC designs. EnSilica has an impressive record of success working across many market segments with particular expertise in multimedia and communications applications. Customers range from start-ups to blue-chip companies. EnSilica can provide the full range of front-end IC design services, from System Level Design, RTL coding and Verification through to either a FPGA device or the physical design interface (synthesis, STA, DFT) for ASIC designs. EnSilica also offers a portfolio of IP, including a highly configurable 16/32 bit embedded processor called eSi-RISC, the eSi-Comms range of communications IP and eSi-Crypto encryption IP. For further information about EnSilica, visit http://www.ensilica.com. eSi-RISC product information and downloads can be found at http://www.esi-risc.com.
|
Home | Feedback | Register | Site Map |
All material on this site Copyright © 2017 Design And Reuse S.A. All rights reserved. |