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Leakage divided by more than 250 at 180 nm eLL with Dolphin Integration Panoply of memory and standard cellsMeylan, France – August 26, 2011. As electronic intelligence is pervading battery-powered consumer and industrial devices, their Systems On Chip must come up with more complex features - while limiting the impact on power consumption and die cost. Such power sensitive applications must rely on architectures of Silicon IPs which enable:
Dolphin Integration is the unique provider to address all of such challenges at the architectural level with the launch of a complete Panoply of Memories and Standard Cells for the new 180 nm eLL process at TSMC. Dolphin Integration's Panoply is a comprehensive set of silicon IPs for low power and Dual Voltage
Benchmark results of Dolphin SpRAM versus Standard SpRAM at 180 nm
For building ultra low power islets at 180 nm eLL
For right-on-first-pass silicon
Ask for more information on product performances and key features, please click here Dolphin Integration is up to their charter as the most adaptive creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation and foundry parnerships. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, resilient to noise and drastic for low power-consumption, together with engineering assistance and product evolutions customized to their needs.
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