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Xylon Announces New SD Host Controller IP for Xilinx FPGAsSeptember 30, 2011 -- Zagreb (Croatia) – Xylon's logiSDHC SD Host Controller IP core now supports Xilinx® 7 Series FPGAs and the ARM® AMBA® AXI4 bus. The new version of Xylon's Secure Digital Host Controller for SD memory and MMC cards enables users to easily add mass storage capabilities to their Xilinx FPGA design. The ARM AMBA AXI4-Lite and AXI4 compatibility enables implementations in the Xilinx Kintex™-7 , Artix™-7 and Virtex®-7 FPGAs. The IP also supports Xilinx Spartan®-6, Virtex®-6 and older Xilinx FPGA families. In addition to that, the logiSDHC IP core can also be configured for work with the CoreConnect™ Processor Local Bus (PLB). The logiSDHC is SD Host Controller Standard Specification Version 2.00 compliant. It supports programmable transfer rates up to the maximum data rate specified by the standard (25 MB/sec and 50MHz bus frequency). The IP core supports non-DMA, standard DMA and Xylon's proprietary DMA data transfers. Just like all other Xylon logicBRICKS IP cores, the logiSDHC SD Host Controller IP core is fully compatible with the Xilinx Platform Studio and the EDK integrated software development tools. FPGA designers can setup the IP core configurations through a GUI, optimize feature sets and control the utilization of FPGA resources, and in a drag & drop fashion, implement Xilinx SoC without hand coding. The logiSDHC IP core license fees offered through Xylon's Low-Volume IP Program (LVIP) start at €1,550 (< $2,100). For datasheet and general information about the logiSD SD Host Controller IP core please visit: The logiSDHC can be easily evaluated on Xylon's logiTAP Platform for Embedded GUI Developments and logiCRAFT-CC Companion Chip Kits, or third-party hardware platforms.
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