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Atrenta and TSMC IP Quality Initiative Gains Broad Industry Acceptance10 companies now qualified under TSMC Soft-IP Alliance Program SAN JOSE, Calif.-- March 5, 2012 -- Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, today announced that 10 intellectual property (IP) providers have qualified their soft IP for inclusion in the TSMC 9000 IP library using the Atrenta IP Handoff Kit. Those companies, part of TSMC’s Soft-IP Alliance Program, include Arteris, Inc.; CEVA; Chips&Media, Inc.; Digital Media Professionals Inc. (DMP); Imagination Technologies; Intrinsic-ID; MIPS Technologies, Inc.; Sonics, Inc.; Tensilica, Inc.; and Vivante Corporation. The participating companies are able to provide quantitative information to TSMC’s customers regarding the robustness and completeness of their soft or synthesizable semiconductor IP that is part of the TSMC 9000 IP library. In May 2011, TSMC and Atrenta announced the Soft-IP Alliance Program, which uses Atrenta’s SpyGlass® platform and a targeted subset of its GuideWare reference methodology to implement TSMC’s IP quality assessment program. TSMC requires all soft IP providers to reach a minimum level of completeness, as documented by Atrenta DashBoard and DataSheet reports, before their IP is listed on TSMC online. Atrenta integrated all the software and methodologies needed to implement TSMC’s IP qualification requirements to form the IP Handoff Kit, which uses the SpyGlass register transfer level (RTL) analysis and optimization product suite. To qualify for inclusion in TSMC Online, soft IP must be verified for language syntax and semantic correctness, simulation-synthesis mismatches, electrical and connectivity rules, power consumption, synchronization of clock domain crossing paths, stuck-at and at-speed test coverage and timing constraints. All results are summarized in Atrenta DashBoard and DataSheet reports that capture the results of these SpyGlass tests in an easy-to-read and track HTML format. “Given the complexity inherent in today’s system on chip (SoC) designs, TSMC is proactively helping our customers mitigate risk and meet their time-to-market goals,” said Suk Lee, director, Design Infrastructure Marketing Division, TSMC. “The IP qualification flow with Atrenta addresses many of the quality challenges inherent in re-using third-party IP. We are pleased with the number of IP providers that are participating in this program and the measurable improvement in delivered IP quality available for TSMC’s end customers.” “As designers face the challenge of finding quality third-party IP, this program – a collaboration between TSMC, Atrenta and IP providers – is a powerful example of what teamwork in the supply chain can accomplish,” said Mike Gianfagna, vice president of marketing at Atrenta. “TSMC customers can now make more informed decisions that improve the handoff of IP between members of the semiconductor supply chain. This is one way to drive more effective SoC Realization.” More information about the participating IP providers is available on the accompanying sheet. About Atrenta Atrenta is a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries. As one of the largest private electronic design automation companies, Atrenta provides a comprehensive SoC Realization solution that delivers higher quality semiconductor IP, predictable design coherence, automated chip assembly and improved implementation readiness. Its SpyGlass® and GenSys™ products and GuideWare reference methodologies open the way for broader deployment of system on chip (SoC) devices in the marketplace, improving time to market, reducing implementation costs and lowering risk. With nearly 200 customers, including 19 of the top 20 semiconductor and consumer electronics companies, Atrenta enables the most complex SoC designs in the world. Atrenta, the SoC Realization Company. www.atrenta.com. Atrenta and TSMC IP Quality Initiative Gains Broad Industry Acceptance Quote Sheet Arteris “Based on our long-standing relationship with TSMC, Arteris is pleased to participate in TSMC’s Soft-IP Alliance Program and TSMC Reference Flows 11 and 12. By validating Arteris’ configurable NoC interconnect IP with the SpyGlass platform, customers can choose our IP and handoff their design to TSMC with even greater confidence.” CEVA “CEVA is committed to streamlining the SoC design process and supply chain through a robust ecosystem that improves the efficiency of how customers use our DSP-based solutions. The link to the manufacturing process is critical as we move into the realm of 28 nanometer and beyond. We are pleased to be able to work with Atrenta and TSMC to certify our IP using TSMC’s soft IP validation kit. This will result in faster and more reliable manufacturability for our customers.” Chips & Media “As consumers demand a better experience from their multimedia devices, SoC designs are becoming more complex. By working closely with TSMC and Atrenta, Chips&Media is capable of delivering its leading-edge video processing technologies to customers more efficiently and effectively.” Digital Media Professionals “In support of our advanced graphics IP technology based on industry-standard OpenGL ES and DMP's proprietary Maestro extension, we are able to leverage excellent semiconductor process technology from TSMC and comprehensive assessment metrics from Atrenta. With a wide-range of leading-edge technologies and eco-system support, DMP will provide highly optimized and validated graphics IPs for embedded markets.” Intrinsic-ID “As SoC devices become more prevalent and customer needs become increasingly more complex, Intrinsic-ID offers a wide-ranging portfolio of IP available in the TSMC 9000 IP library. Working with TSMC and Atrenta, the quality of our IP is demonstrated and customers will be more informed when using it in their designs, reducing the risk in the handoff to other members of the supply chain.” MIPS “The Atrenta IP Handoff Kit can help assure customers of quality and consistency across the variety of IP available for use at TSMC. As a member of the TSMC Soft IP Alliance Program, MIPS Technologies is committed to working closely with TSMC to speed our customers’ time-to-market. Starting with our superscalar multicore MIPS32® 1074K™ coherent processing system, MIPS is leveraging the IP Handoff Kit to validate that our IP meets and surpasses TSMC’s expectations of quality for soft IP.” Sonics “As the number of unique IP cores increase with each process node, the need for a reliable, high-performance on-chip network is critical for successful SoC execution. As a partner in the Atrenta and TSMC IP Quality Initiative, and a TSMC Soft IP Alliance member, Sonics gives customers complete assurance and support from the initial design to TSMC hand-off. Our partnership with Atrenta continues to help semiconductor leaders realize their broad range of SoC designs, and the SpyGlass product suite will continue to play an integral part of Sonics’ RTL flow.” Tensilica “Tensilica is pleased to participate in TSMC’s Soft-IP Alliance Program after many years of producing successful tapeouts for mutual customers. By validating our IP against quality metrics established by TSMC and measured using the SpyGlass platform, our customers can choose Xtensa processors and deliver their designs to TSMC with even greater confidence.” Vivante “Vivante is pleased to be part of TSMC’s Soft-IP Alliance Program, offering customers our full line of high performance, power efficient GPU/GPGPU cores. By going through extensive validation of our IP on the SpyGlass platform to ensure reliability and quality, customers can be confident that selecting Vivante products will reduce their risk and expedite time to market of their designs.”
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