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Audio Codec IP - 40 nm: Dolphin Integration passed TSMC IP9000 Level 4 qualification at Low Power processGrenoble, France – November 9, 2012 -- Dolphin Integration has rolled out at 40 nm their offering of mixed signal Audio Codec based on the high-End Xenon architecture. It confirms their position as the leading IP partner with the completion of level 4 on IP 9000 TSMC qualification program. "We are proud to announce a score of 100% which demonstrates our maturity in Audio sub-systems based on more than 25 years of expertise“, shared Vincent RICHARD, Audio Product Marketing Manager. The Xenon converter family enables to reach 100 dB of SNR on ‘A-weighted’ playback mode. Such cores are perfectly suitable for HDTV, Set Top Box, Car sound system, audio Dock and Tablets, thanks to their double advantage of high resolution and high density. Xenon at 40 nm features the Audio Data Adaptive Synchronizer (ADAS) which enables automatic synchronization two optimizations at once:
For enhancing the sound quality experience, the Xenon codec can embed several logic features among which an Automatic Gain Control (AGC), a Filter Bank or a Soft-Clipping Dynamic Range Compressor (Soft-Clipping DRC). Dolphin Integration facilitates a safe SoC integration by providing new views and specifications:
For further information, feel free to download the Measurement Report or to contact jazz.audio@dolphin.fr For more information about Dolphin Integration's product portfolio and Xenon's IP 9000 status, please visit us at www.dolphin.fr/jazz About Dolphin Integration Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, such as mixed signal high-resolution converters for audio and measurement applications, Libraries of memories and standard cells, Power management networks, Microcontrollers. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own missing EDA solutions enabling Support Engineering with Application Hardware Modeling as well as early Power and Noise assessment, plus engineering assistance for Risk Control
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