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Motorola Adopts Mentor Graphics FormalPro for Verification of Multi-million Gate Cellular Base Station ASICsWILSONVILLE, Ore., May 22, 2002 - Mentor Graphics Corporation (Nasdaq: MENT) today announced that Motorola's (NYSE: MOT) cellular infrastructure design center has selected the Mentor Graphics® formal verification product, FormalPro™, for the validation of application-specific integrated circuits (ASICs) for its next-generation base stations. The cellular infrastructure design center, located in Fort Worth, Texas, is using FormalPro to verify designs from multiple locations, including Arlington Heights, Ill. and Swindon, UK. "We have used FormalPro on three designs of up to three million gates, and the tool is enabling us to meet both our aggressive project schedules and high quality goals," said David Mueller, senior resource manager, Base Transceiver Subsystem Center of Excellence, Motorola, Fort Worth, Texas. As the complexity of integrated circuits grows, the time required to apply the traditional method of gate level simulation becomes prohibitively long. FormalPro uses equivalence checking to prove that a design is functionally equivalent to a previously validated reference design. This technique enables designers to save months in the time taken to verify their designs at all stages of the implementation process, including RTL, synthesis, design-for-test, layout and engineering change orders. "We are delighted that an industry leader such as Motorola's cellular infrastructure design center has selected FormalPro," said Reily Jacoby, FormalPro product line manager at Mentor Graphics. "Their success demonstrates the strength of FormalPro in meeting the most demanding verification challenges." About Mentor Graphics ###
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