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Avery Design Systems Announces eMMC 5.0 Verification IP SolutionANDOVER, MA. -- August 12, 2013 – Avery Design Systems Inc., a leader in verification IP (VIP), today announced availability of its eMMC 5.0 verification solution. eMMC-Xactor are complete verification solutions enabling design and verification engineers to quickly and extensively test the functionality of memory systems. The VIP includes:
Models and compliance testsuites are developed in native SystemVerilog and supports UVM verification environments. “Avery is focused on delivering industry leading VIP for the rapidly emerging SSD and other storage-related standards built on top of PCIe, USB, and MIPI base protocols”, says Chilai Huang, president of Avery Design Systems. “Our solution enables designers to thoroughly verify their designs functionally adhere to the new SCSI Express standard and effectively pinpoint areas of non-compliance or performance bottlenecks.” Visit us at the Flash Memory Summit held on August 13-15 in booth #826. Avery supports a full range of embedded storage and SSD VIPs including eMMC, SD/SDIO, Universal Flash Storage (UFS), SCSI Express (SOP/PQI), NVM Express, SATA Express, SATA, USB Attached SCSI (UASP), and ONFI/Toggle Flash. About Avery Design Systems Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for automatic property and coverage generation and RT-level and gate-level X verification; robust core-through-chip-level Verification IP for PCI Express, USB, UAS/BOT, AMBA, UFS, MIPI UniPro/M-PHY, DDR/LPDDR, NVM Express, SCSI Express, SATA, SATA Express, eMMC, and SD/SDIO standards. The company is a member of the Mentor Graphics Value Added Partnership (VAP) program and has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.
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