Eureka Technology Joins MIPS Alliance Program with IP Support for SoC Designs

Los Altos, CA -- October 18, 2001 -- Eureka Technology Inc, a leading intellectual property (IP) provider, today announced that it has joined MIPS Technologies' (Nasdaq: MIPS, MIPSB) MIPS™ Alliance Program (MAP), and further announced the availability of several IP cores designed specifically to support the industry-standard MIPS32™ 4K™ and MIPS64™ 5K™ families of processor cores.

"We are very excited about becoming a member of the MAP program and the addition of the new IP cores for use in creating new highly-integrated MIPS-based™ processors," said Simon Lau, President of Eureka Technology. "Eureka Technology has been focusing on system-on-chip (SoC) design with support for most popular embedded CPUs for a wide range of applications. These new cores provide risk-free and readily available design solutions to our customers who are using the MIPS processor architecture."

The new IP cores support the MIPS EC™ Interface for embedded processor cores as well as the SysAD bus for compatibility with existing OEM designs using MIPS-based CPUs. Eureka's cores include CPU bus slave, PCI bridge, SDRAM controller, and system controller, which is an all-in-one companion chip to the MIPS processor. These IP cores support many advanced features of the EC and SysAD interfaces, such as address pipeline and out-of-order execution. Each of these cores is pre-verified and can be used in a stand-alone format or integrated with other Eureka IP cores for different applications. These cores are available for licensing in Verilog and VHDL source code format, and in netlist format supporting most popular FPGA and PLD devices.

"Using pre-verified IP cores substantially shortens the time-to-market for today's SoC designers," said Kevin Meyer, vice president of marketing at MIPS Technologies. " We are very pleased that Eureka Technology is offering silicon-proven IP cores that are designed specifically to support the MIPS architecture. Pre-verified cores contribute to the success of our customers' programs ."

The MIPS Alliance Program (MAP) provides its members with sales and technical assistance as well as broad marketing support such as Internet and traditional marketing and promotional activities. MAP members are third-party vendors who provide complete solutions around MIPS Technologies processors. MIPS-based processors are found in digital entertainment devices such as set-top boxes and game consoles, consumer electronics, office automation machines and communications/networking equipment such as routers and servers.

Detail product information of these IP cores is available from the Eureka Technology web site at http://www.eurekatech.com

About Eureka Technology
Eureka Technology is a leading intellectual property (IP) provider for ASIC and FPGA designers. The company offers a wide range of silicon-proved system core logic functions and peripheral functions for systems based on PCI bus and various embedded CPUs including the MIPS32 and MIPS64 CPU cores. These IP cores are designed to improve the design time-to-market delay, eliminate design risks, and reduce development costs. Founded in 1993, the company has a strong customer base in the United States, Japan and Europe. For more information about the company, please visit the Web site at http://www.eurekatech.com or send email to info@eurekatech.com.

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Contact:

Annie Leung
Eureka Technology Inc.
Tel: 650 960 3800
Email: annie@eurekatech.com
Web site: http://www.eurekatech.com