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Arasan Chip Systems Presents MIPI D-PHY, M-PHY and USB 2.0 IP at the 51st DACArasan’s MIPI D-PHY, M-PHY and USB 2.0 Mobile IP Solutions will be on display in booth #716 and the Hot IP Track at DAC June 2-4, 2014 in Moscone Center, San Francisco, CA. San Jose, CA. -- May 27, 2014 -- Arasan is a leader in providing silicon proven MIPI IP cores to system companies for mobile connectivity and storage. MIPI D-PHY and CSI for camera interface, and MIPI D-PHY and DSI for display interface, are mobile industry standards. MIPI M-PHY for Universal Flash Storage (UFS) offers a new level of performance for mobile storage. Arasan’s hardware validation platforms (HVPs) are used for IP validation and compliance testing. At DAC in Booth #716, we are showcasing hardware solutions for SoC / ASIC prototyping. We are demonstrating daughter cards that provide 4 lanes of MIPI D-PHY at 1.5Gbps, and 2 lanes of MIPI M-PHY at 5.8Gbps. We will be presenting a paper on MIPI modules for SoC prototyping at the Hot IP Track, June 2 at 1:30PM. USB for Mobile Availability USB 2.0 Total IP solution includes host, hub, device and OTG controllers with associated software, the HSIC chip to chip PHY, and the USB 2.0 mixed signal PHY available in process nodes ranging from 180nm to 28nm About Arasan Unlike many other IP providers, Arasan’s Total IP Solution encompasses all aspects of IP development and integration, including analog and digital cores, hardware development kits, protocol analyzers, validation IP and software stacks and drivers and optional architecture consulting and customization services. Based in San Jose, CA, USA, Arasan Chip Systems has a 17 year track record of IP and IP standards development leadership.
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