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Atrenta and Xilinx Partner to Deliver Predictive Analysis for Virtex Platform FPGAsSpyGlass Predictive Analyzer Streamlines Advanced FPGA Platform for Programmable Systems Design SAN JOSE, Ca. - July 9, 2002 - Atrenta Inc., the Predictive Analysis company, and Xilinx, Inc. (Nasdaq:XLNX) the programmable logic leader, today announced the release of new capabilities and Virtex-specific rules for Atrenta's SpyGlassTM software. Atrenta worked directly with Xilinx to define, develop and test a comprehensive set of rules that helps designers identify downstream issues early in the design cycle. This specialized rule deck for SpyGlass performs structural analysis on Verilog and VHDL RTL code to help ensure that code meets advanced design requirements and FPGA design best practices. Unlike conventional RTL checkers that simply analyze the text and infer potential problems, SpyGlass employs predictive analysis technologies including fast-synthesis and logic evaluation to create a structural representation of the RTL in order to perform in-depth analysis early in the design cycle. This allows SpyGlass to be more precise in pinpointing problems while more accurately guiding the user to the best results. Atrenta developed an extensive set of rules focused on helping the user quickly identify RTL constructs that should be changed to ensure compliance and best practices. SpyGlass also detects potential synthesizability and simulation problems in the RTL, thus avoiding time-consuming rework. ``Xilinx is pleased to partner with Atrenta in order to bring advanced analysis capabilities to help customers optimize their RTL when targeting the Virtex family of Xilinx FPGAs,'' said Rich Sevcik, senior vice president, FPGA Products at Xilinx. ``SpyGlass' unique and innovative predictive analysis will help streamline the Platform for Programmable Systems design process that Xilinx FPGAs now offer in our VirtexII and VirtexII-pro series.'' The first release of this exclusive Xilinx predictive analysis solution is comprised of an extensive set of rules that includes Virtex-specific rules and good FPGA design practices. SpyGlass also checks for advanced design issues like: (a) ensuring that all inferred registers use synchronous resets, (b) ensuring that FSMs (finite state machines) are coded into separate processes, (c) detecting combinational feedback loops, and (d) checking that multiple clocks are not part of the same always block or process statement, and many more. "We are happy to work with Xilinx to bring products to market that increase productivity for our common customers," said Dr. Bernard Murphy, vice president and chief technical officer at Atrenta. "We believe SpyGlass will provide Xilinx users with an automated approach to enforce advanced design rules and play a crucial role in meeting engineering schedules." Atrenta is a partner of Xilinx and a member of the Alliance Program. Availability About Atrenta About Xilinx ### Atrenta, the Atrenta logo and SpyGlass are trademarks of Atrenta Inc. Xilinx and Virtex are registered trademarks of Xilinx Inc. All other trademarks are the property of their respective owners.
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