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Cirronet Selects Atmel's FPSLIC Programmable SOC for Baseband Processing of WaveBolt NLOS Wireless BroadbandSAN JOSE, CA, July 29, 2002 . . . Atmel Corporation (Nasdaq: ATML) announced today that wireless Internet access equipment provider, CirronetTM, Inc., has selected Atmel's FPSLIC™ programmable system-on-chip as the baseband processor of its WaveBoltTM wireless broadband Internet access system. WaveBolt provides low-cost, residential, non-line-of-site (NLOS) wireless broadband receive and transmit capability to Internet service providers (ISPs) and their customers, using Cirronet's patented frequency hopping spread spectrum (FHSS) technology in the license-free 2.4 GHz frequency. The WaveBolt system provides 1-Mbps download with a low capital cost of around $400 per subscriber for both ISP equipment and subscriber model. This allows recovery of the ISP's capital in one year or less. Cirronet's WaveBolt system is particularly attractive in rural and developing areas where land lines are not readily available or where cost and geography prevent the use of LOS systems. According to WaveBolt's system architect Greg Ratzel, "We evaluated several alternatives prior to selecting FPSLIC. The WaveBolt system needed to be small and inexpensive, while simultaneously providing enough processing power to do baseband processing and packet sequencing. Because integration was important, we looked at a number of programmable SoCs. The higher-end ones were overkill for this application. We did not need a 32-bit processor and we didn't need a giant and expensive FPGA. Of the 8-bit solutions on the market, we felt that even with a high clock speed, an 8051-based solution did not have the horsepower to do the packet sequencing. In addition, the design tools offered limited flexibility in how the FPGA could be used. "The large SRAM on the FPSLIC was a major reason we chose this device. We had plenty of room for data buffers for the store and forward read scheme. Another advantage of the large SRAM is that executing from the SRAM the AVR delivers 20+ MIPS. The 32 registers and the very efficient instruction set of the AVR also contributed to our choice, as did the VHDL-based design tools and assembler and compile environment. This is about a close as you can get to a single-chip system. The only other digital IC in the product is the configuration EEPROM," Ratzel added. Saroj Patak of Atmel's FPSLIC team commented," The Cirronet design puts FPSLIC programmable SoCs in the same league with the expensive 32-bit processors and ASSPs that are commonly used for wireless baseband processing, without the high cost or high power consumption associated with these devices. This application validates Atmel's engineering efforts to achieve a high throughput, low cost baseband processing solution in a single chip FPSLIC device. FPSLIC programmable SoCs integrate an AVR processor, 5,000 to 40,000 FPGA gates, and up to 36 KBytes of SRAM on a single chip. Secure versions are available with the configuration EEPROM on board. Power consumption is only 50 uA in standby and 2 to 3 mA/MHz during operation. Prices for FPSLIC devices start as low as $3,25 per 100K units. About Atmel About Cirronet © Atmel Corporation 2002. All rights reserved. Atmel, the Atmel logo and combinations thereof are registered trademarks, and others contained herein are trademarks, of Atmel Corporation. Other terms and product names in this document may be the trademarks of others.
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