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Xilinx Announces SDSoC Development Environment for All Programmable SoCs and MPSoCsCompany extends its SDx product family and continues to expand its user base to the broad community of systems and software engineers SAN JOSE, Calif., March 9, 2015 -- Xilinx, Inc. (NASDAQ:XLNX) today announced the SDSoC™ Development Environment for All Programmable SoCs and MPSoCs. The third member of the Xilinx® SDx™ family of development environments, the SDSoC development environment enables the broader community of embedded software developers to leverage the power of hardware and software 'all programmable' devices. The SDSoC environment provides a greatly simplified ASSP-like programming experience including an easy to use Eclipse integrated design environment (IDE) and a comprehensive development platform for heterogeneous Zynq® All Programmable SoCs and MPSoCs deployment. Complete with the industry's first C/C++ full-system optimizing compiler, SDSoC delivers system level profiling, automated SW acceleration in programmable logic, automated system connectivity generation, and libraries to speed programming. It also enables end user and 3rd party platform developers to rapidly define, integrate, and verify system level solutions and enable their end customers with a customized programming environment. ASSP-Like Programming Experience Full System Optimizing Compiler System Level Profiling Expert Use Model for Platform Developers "With Xilinx's new SDSoC Development Environment, in combination with the MicroZed board-based vision platform and Xylon logicBRICKS™ intellectual property for embedded graphics and video, nontraditional FPGA developers are now empowered to rapidly configure, prototype, and develop a complete smart vision system in a familiar C/C++ based workflow," said Davor Kovacec, founder and CEO of Xylon. "This combination will truly open up the power and potential of All Programmable SoCs and MPSoCs to all design teams." Availability About SDx About Xilinx Quote Sheet "Xilinx and Analog Devices have collaborated to develop the Zynq SDR System Development kit that accelerates rapid prototyping of wideband radio applications through the abstraction of an accompanying SW stack running Linux on the Zynq processing system. ADI now supports the new SDSoC development environment for this platform that allows customers to rapidly configure, prototype, and develop both the communication (L2/L3) and physical layers (L1) of the wireless communication protocol from a software centric development environment." "Van Gogh Imaging develops object recognition solutions (based on 3D computer vision technique) for embedded devices in markets such as medicine, UAV, robotics, security, automotive, and machine vision. As pure software engineers, we were able to take a 3D object recognition concept to an accelerated Zynq design within a month achieving an order of magnitude speedup (and smaller form factor) compared to our x86 solution. We believe that SDSoC is the future of Zynq programming!" "DAVE Embedded Systems' BORA module features a Xilinx Zynq-7000 SoC and is suitable for high-end applications such as medical instrumentation, advanced communication systems, critical real-time operations, and safety applications. This platform combined with Xilinx's new SDSoC is empowering software engineers with an ASSP-like development environment, which enables rapid system level profiling and program acceleration leveraging its full system optimizing compiler. SDSoC is truly enabling software engineers to take advantage of acceleration in programmable logic all will working in familiar C/++." "The Iveia Atlas-I-Z7e is a low power, small form factor processing module featuring the Xilinx Zynq-7000 All Programmable SoC. The platform is ideal for video applications since the complex video co-processing occurs on the same device using the combined processing elements of the programmable logic and ARM processors. Leveraging SDSoC one of our software engineers was able to complete a complex canny edge detection system for a 1080p embedded vision system rapidly mapping five software accelerators to the programmable logic in a manner of days with no hardware designer intervention. This type of productivity is not seen in current design flows offered by other vendors."
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