Dolphin Integration unveils a new generation of low-noise regulators for IoT at 55 nm

Grenoble, France – May 25, 2015 -- Eager to address the low-power challenge of IoT markets, most IP providers neglect the needed complements for dealing with the sensitive analog parts, necessarily embedded on Systems-on-Chip targeting connected devices.

Dolphin Integration rolls-out the nLR-Charny, latest generation of Low-Noise Linear Regulator, upgraded to help System-on-Chip integrators to secure the operations of RF blocks. It meets stringent low noise requirements and provides power noise resilience. The nLR-Charny is an essential component for a panoply of standard cells, memories and power regulators for meeting the challenges of embedded low power voltage domains.

Key features :

• Intrinsic output noise of 20 µVrms within the 20 Hz to 20 kHz bandwidth
• Power noise resilience better than 65 dB, up to 10 kHz
• ± 3% DC accuracy, including Line and Load regulation
• Embedded IO-cells with ESD protections
• Soft-start feature, and over-current and temperature protections
• Advanced views for enabling Noise Propagation Checks (NPC)
• Complelented with the Over-voltage Protection Module (OPM) for enabling direct connection to Li-Ion battery.
• Availability at TSMC and SMIC 55 nm and easily re-targetable from 180 nm to 40 nm at most of top foundries

To ensure a smooth integration within an overall Power Management Network (PMNet), the nLR-Charny meets the DELTA Standard enabling optimal construction of the System-on-Chip. The immediate benefit is a shorter time-to-market, involving development safety, thanks to standardized and reusable regulation components.

Indeed, building a PMNet implies verifying it, as well as performing the verifications from the earlier stages of the PMNet definition and optimization, down to the completion of the physical implementation. To address this need, specific views (simulation models) are provided to verify the adequacy of the PMNet with its loads in different operating scenarios so that:

• The power supply voltage of each power domain will remain in the operating range of each load during the transition from one operating mode to another (MTC: Mode Transition Check).
• The noise generated on the power supplies by the various loads and noise sources across the PMNet will not degrade the performances of noise-sensitive loads (NPC: Noise Propagation Check).
• The integration is properly structured and sized : assembly, routing, decoupling, etc.

For ensuring a straightforward pathway for right-on-first-pass SoC, Dolphin Integration then features the PowerVision^TM EDA solution. The advanced views must consistently be provided as standard deliverables for each functional component of a Power Management Network, together with some guidelines for facilitating their usage.

For more information about such products and EDA solutions, please visit our website at dolphin-integration.com or contact us at regulators@dolphin-ip.com.

About Dolphin Integration

Dolphin Integration contributes to "enabling mixed signal Systems-on-Chip" for worldwide customers - up to the major actors of the semiconductor industry - with Silicon IP components best at low-power consumption.

This wide offering is based on innovative libraries of standard cells, register files, memory generators and power regulators. Complete networks for power supply can be flexibly assembled together with their loads: from high-resolution converters for audio and measurement applications to power-optimized micro-controllers of 8 or 16 and 32 bits.

Over 30 years of diverse experiences in the integration of silicon IP components and providing services for ASIC/SoC design and fabrication, with its own EDA solutions solving unaddressed challenges, make Dolphin Integration a genuine one-stop shop covering all customers’ needs for specific requests.

The company striving to incessantly innovate for its customers’ success has led to two strong differentiators:

• state-of-the-art “configured subsystems” for high-performance applications securing the most competitive SoC architectural solutions,
• a team of Integration and Application Engineers supporting each user’s need for optimal application schematics, demonstrated through EDA solutions enabling early performance assessments

Its social responsibility has been from the start focused on the design of integrated circuits with low-power consumption, placing the company in the best position to now contribute to new applications for general power savings through the emergence of the Internet of Things.