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StreamDSP Announces latest v5.1 update to its VITA 17.1 sFPDP IP CoreThe release of version 5.1 of the VITA 17.1 sFPDP IP core has been announced by StreamDSP, enabling support for Arria-II GZ, Arria-V GZ, Zynq-7000, and Virtex UltraScale to the already long list of support FPGA families. Columbus, OH -- July 15, 2015 -- The StreamDSP sFPDP IP core is a fully-compliant implementation of the Serial Front Panel Data Port (sFPDP) communications standard, as defined by the VITA 17.1-2003 specification. With its latest release, StreamDSP has added additional support for Arria-II GZ, Arria-V GZ, Zynq-7000, and Virtex UltraScale devices. StreamDSP supports the following FPGA devices in the latest v5.1 release of the StreamDSP sFPDP IP Core:
StreamDSP provides "ready-to-run" simulations, evaluations, and reference designs targeted to popular development boards for each of the supported FPGA families. This allows StreamDSP's customers to quickly and easily verify proper operation both in simulation and with their chosen device family and greatly shorten integration time. The wide range of FPGA device support also allows StreamDSP to do extensive compatibility testing between different FPGA families using their own array of development boards, sFPDP based equipment, and a sFPDP protocol analyzer from Absolute Analysis. The sFPDP IP core from StreamDSP makes it simple for customers to connect Altera and Xilinx devices together with very high bandwidth connections. "By constantly adding new device support and improving our feature set, we've become the leading supplier of Serial FPDP IP," said Greg Schueller, StreamDSP's Director of Business Development. "With the addition of Zynq-7000 and Virtex UltraScale support, we've ensured that our customers can continue evolving their sFPDP based products to the latest generation of devices from Altera and Xilinx. Our customer base continues to grow and Serial FPDP continues to be the high-speed serial protocol of choice for remote sensors and simple plug-and-play connectivity between Altera and Xilinx devices," added Greg. To support the growing number of requests for even higher bandwidth, StreamDSP also provides a multi-lane wrapper that can be used to channel-bond several sFPDP lanes together. This gives StreamDSP's customers access to very high-bandwidth multi-lane data paths. In addition, StreamDSP is currently involved in the definition of VITA 17.3, which will be the successor to VITA 17.1, providing advanced encoding and native channel bonding. More information about the Serial FPDP VITA 17.1 Standard can be found at http://www.vita.com. For more specific information about StreamDSP's IP products, please visit: http://www.streamdsp.com, or call (855) 377-3742. About StreamDSP LLC StreamDSP is an intellectual property (IP) company specializing in video, serial communications, and data storage solutions for Field Programmable Gate Array (FPGA) devices. Headquartered in Columbus, OH, StreamDSP has over 50 years of combined experience serving the military and commercial markets, and is focused on developing IP and providing custom design services for FPGAs.
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