MIPS CPUs continue to push boundaries from low to high end

New 32-bit CPUs for high performance deeply embedded applications and top-of-the-range 64-bit processors add to increasingly compelling CPU IP portfolio

LONDON, UK – 10th November, 2015 – Imagination Technologies (IMG.L) announces compelling new additions to its MIPS Warrior CPU product line, as its growing portfolio and unique roadmap gain momentum. The broadening range of highly efficient MIPS CPUs enables an increasing number of licensees, both existing and new, to choose solutions ideally matched to their differentiated feature set, performance and business goals.

The new additions to the MIPS family include the embedded 32-bit M-class M6200 and M6250 CPUs and high-end P-class P6600 64-bit CPU.

The growing interest in and demand for MIPS cores is the driver behind Imagination creating solutions that meet a wider range of customer requirements. Imagination will continue to deliver more new cores as customers work closely with the MIPS team to create solutions that meet their exacting needs and expectations, enabling them to deliver differentiated solutions.

The MIPS P6600 is the next evolution of the MIPS P-class family, building on the 32-bit P5600 CPU, and paving the way to future generations of higher performance 64-bit MIPS processors. The P6600 is the most balanced mainstream high-performance CPU choice, enabling powerful multicore 64-bit SoCs with optimal area efficiency for applications in segments including mobile, home entertainment, networking, automotive and more. Customers have already licensed the P6600 for applications including high-performance computing and advanced image and vision systems.

The MIPS M6200 and M6250 are the latest additions to Imagination’s popular M-class family processors for MCUs/MPUs, further broadening the M-class roadmap for high-performance deeply embedded designs in segments requiring higher performance and larger address space, including wired/wireless modems, GPU supervisor processors, flash and SSD controllers, packet processing, industrial and motor control, advanced voice processing and more.

All based on the MIPS Release 6 (r6) architecture, the products extend the range of Imagination’s solutions in the high-volume mainstream CPU IP market.

Says Tony King-Smith, EVP of marketing at Imagination: “Customers keep telling us they want different price/performance CPU cores to what is currently on offer in the market. Responding to their needs, we’re delivering an ever more comprehensive roadmap that addresses their real system needs and provides them with the choice of CPU IP cores they all tell us they really want.“

MIPS P6600 key features

• High-performance 64-bit MIPS Warrior CPU based on a 16-stage multi-issue Out of Order (OoO) pipeline implementation, delivering outstanding computational throughput and area efficiency
• Integrated compiler-friendly 128-bit MIPS SIMD Architecture (MSA) support for efficient parallel processing of vector operations in multimedia applications
• Sophisticated branch prediction with fully associative Level 1 BTB (branch target buffer) and an improved Level 2 cache sub-system
• Full hardware virtualization support and Imagination’s OmniShield™ technologies for enhanced security and reliability in a wide range of applications

MIPS M6200 MCU & M6250 MPU key features

• Low-power, compact 32-bit CPUs based on a 6-stage pipeline implementation, enabling 30% higher frequencies versus the MIPS microAptiv CPU for similar implementations
• Integrated DSP and SIMD functionality to address signal processing requirements of such applications as industrial/motor control, voice processing and more
• Support for microMIPS r6 Instruction Set Architecture (ISA) for superior code compression and reduced memory footprint
• Data integrity features, including ECC and parity protection
• AMBA APB debug interface enabling JTAG, multi-core and mixed core debugging
• M6200 MCU:
  • Includes a memory controller for tightly coupled 64-bit Instruction/Data SRAM
  • A memory protection unit enables program/data security
• M6250 MPU:
  • Includes a memory controller for Instruction/Data L1 cache and optional tightly coupled ScratchPad RAMs (SPRAMs)
  • A Memory Management Unit (MMU) supports virtual memory, enabling full support for Linux and other high level operating systems
  • 40-bit eXtended Physical Addressing (XPA) support
  • AMBA AXI3 Bus Interface Unit

Continues King-Smith: “This has been a breakthrough year for the MIPS architecture. Our partners have announced multiple devices based on the latest MIPS Warrior CPUs and we are delighted to see those MIPS-based products reach the market as we continue to deliver new cores designed to deliver the compelling PPA* proposition our customers need in their products.”

Availability
The M6200, M6250 and P6600 are all available now. Contact info@imgtec.com for more information.

About MIPS CPUs
MIPS CPUs comprise a comprehensive portfolio of low-power, high-performance microprocessor IP cores and architectures, ranging from solutions for high-end applications processing down to solutions for extremely small, deeply embedded microcontrollers. MIPS CPUs power billions of products around the globe. The 64-bit MIPS architecture is widely deployed in a large number of products, and is supported by a vibrant and growing ecosystem, built over more than 20 years.

About Imagination Technologies
Imagination is a global technology leader whose products touch the lives of billions of people across the globe. The company’s broad range of silicon IP (intellectual property) includes the key processing blocks needed to create the SoCs (Systems on Chips) that power all mobile, consumer and embedded electronics. Its unique software IP, infrastructure technologies and system solutions enable its customers to get to market quickly with complete and highly differentiated SoC platforms. Imagination’s licensees include many of the world’s leading semiconductor manufacturers, network operators and OEMs/ODMs who are creating some of the world’s most iconic products. See: www.imgtec.com.