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Amphion targets AMBA-based System-On-Chip designs with accelerator cores for JPEG2000, MPEG-4, MPEG-2 'Star IP' cores for digital video/imaging feature industry-standard AHB bus interfaces for faster system-level integration with embedded RISC and DSP processors, memory and peripherals San Jose, California & Belfast, N. Ireland (Sept 10, 2002) - Amphion Semiconductor, Inc., the leading provider of semiconductor intellectual-property (IP) for digital video and broadband wireless system-on-a-chip (SoC) design has developed ASIC- and FPGA-targeted versions of its hardware-accelerator cores for MPEG-4, MPEG-2, and JPEG2000 compression with AHB interfaces compatible with the AMBA® specification for on-chip system bus connectivity. The provision of Advanced High-Performance Bus (AHB) interfaces greatly enhances the applicability of Amphion's silicon-efficient core solutions to AMBA-based SoC designs, such as those leveraging RISC microprocessor cores from ARM® and other processor IP providers. The move to wrap its accelerator cores with industry-standard interfaces is integral to Amphion's strategy to expedite the design of complex systems-on-silicon for multimedia communications applications. Stephen Farson, Vice President of Engineering at Amphion, commented "With AHB-ported cores for MPEG-4, MPEG-2 and JPEG2000, Amphion corners the market for SoC-ready solutions for three key consumer-focused compression technologies. Chip designers, EDA vendors, and third-party IP providers are converging on AMBA AHB connectivity to the point where it's one of the most widely used on-chip system bus schemes." Originally proposed and developed by ARM, the leading supplier of 16-/32-bit embedded RISC microprocessor solutions, AMBA prescribes an on-chip bus infrastructure for the interconnection and protocol-driven interworking of peripheral IP and functional blocks with embedded processors. These system-level components are typically combined in SoC designs to integrate complex silicon platforms for digital convergence products from home gateway/set-top boxes to networked video games consoles and other streaming-media enabled appliances. Digital Video and Imaging cores for AMBA-based SoC Also ported for AHB is the Amphion CS6510 JPEG2000 Encoder, an extremely high performance 172-kgate implementation for JPEG2000 based real-time image coding systems. JPEG2000 is the new 'wavelet transform' based standard for digital still image compression and the successor to the ageing JPEG standard. JPEG2000 renders significantly crisper text and graphics at compression ratios up to 40:1 compared to the 20:1 limit of JPEG. The Amphion CS6510 accelerator core carries out computationally-intensive tasks such as wavelet transform, entropy coding, quantization, and data scheduling, freeing the on-chip embedded processor to control value-add tasks such as user interface management and data formatting. Fully compliant with the ISO/IEC 15444-1 standard, the CS6510 performs full-motion image encode at rates up to 60-MegaSamples/second in 180nm process technologies. About AMBA A typical AMBA-based SoC consists of a high-speed, high-bandwidth system bus (AHB) and a peripheral bus (APB). The AHB bus supports multi-master bus management and connects embedded processors to peripherals, DMA controllers, memory blocks and I/O interfaces. The APB bus is a simpler bus protocol designed for general-purpose/ancillary peripherals (UARTs, timers, interrupt controllers, I/O ports, etc) and connects to the system bus via a power-saving bridge. About Amphion Notes to Editors:
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