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TriCN introduces low power LVDSinterfaceNetworking interface bandwidth performance exceeds NPSI requirements SAN FRANCISCO, CA –October 21, 2002 –TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the immediate availability of its new Low Power LVDS (Low Voltage Differential Signal) interface. TriCN's Low Power LVDS operates at nearly half the power demands of a standard LVDS I/O, with bandwidth performance capabilities in excess of the NPSI (Network Processor Streaming Interface) requirement. "Chip designer's are always looking for any advantage they can gain in reducing power requirements, while increasing performance," Ron Nikel, Chief Technology Officer of TriCN. " The power savings and bandwidth performance capacity of TriCN's Low Power LVDS will be particularly attractive to developers of network processor chips, or any systems designer looking to reduce overall power demands." Bandwidth Performance Availability About TriCN For more information, please visit TriCN's web site at www.tricn.com.
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