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Oski Technology Launches Formal Verification IP Portfolio for ARM AMBA Interface ProtocolsMOUNTAIN VIEW, CA-- Feb 22, 2017 - Oski Technology, Inc., the leader in formal verification methodology and services, today announced its move into verification intellectual property (VIP) with immediate availability of the Oski Formal Verification IP Library for ARM® Advanced Microcontroller Bus Architecture (AMBA®) interface protocols. The library, silicon proven through its widespread use by Oski for formal sign-off at semiconductor companies worldwide, offers verification engineers a way to test protocol compliance through exhaustive formal testing of system-on-chip (SoC) designs. It is portable across the spectrum of verification technologies and methodologies and compatible with a variety formal verification, simulation and emulation tools. Each component offers comprehensive checking, including interface protocol and configuration checks and system-level properties. "We want to make it easier for people to be successful with formal verification," remarks Roger Sabbagh, Oski's vice president of applications engineering. "Formal verification engineers now can leverage Oski's years of experience and skill with our silicon-proven VIP library for formal verification sign-off." VIP library components currently are available for both interface protocol rules and coherency properties for all revisions of the ARM Coherent Hub Interface (CHI) and AXI Coherency Extension (ACE) standards. The Oski Formal VIP Library includes AMBA 5, AMBA 4 and AMBA 3 ARM protocols and are designed for both register transfer level (RTL) block verification and architectural verification applications. Using advanced formal abstraction techniques, Oski VIP are crafted carefully for maximum efficiency of formal analysis. Arteris is a leading network-on-chip (NoC) provider and extensively uses the Oski Formal Verification IP Library. "We achieved enhanced verification productivity and design quality by deploying Oski's Formal Verification IP on our NoC designs," says Arteris' vice president of engineering Joe Butler. "Adding the library to our formal verification methodology ensured we were able to verify our compliance to ARM protocols for an exhaustive number of possible use cases, which is impractical with simulation alone." Availability and Pricing For details, go to: http://bit.ly/2mi7z4R Oski Technology at DVCon DVCon's exhibits open Monday, February 27, with the yearly Booth Crawl from 5 p.m. until 7 p.m. Additional exhibit hours will be held Tuesday, February 28, and Wednesday, March 1, from 2:30 p.m. until 6 p.m. Vigyan Singhal, Oski's president and chief executive officer, will be a speaker during the Synopsys-sponsored tutorial "Formal Verification Methodology: Maximizing Productivity and Achieving Formal Closure with Confidence." It will be held in the Cascade meeting room, Thursday, March 2, from 2 p.m. until 5:30 p.m. More information about DVCon can be found at: www.dvcon.org About Oski Technology
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