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Motorola Unveils Next Generation Superscalar 32-Bit ColdFire(R) Microprocessor CoreV5 Microprocessors to Offer Performance Starting at 610 MIPS SAN JOSE, Calif., Oct. 16 /PRNewswire-FirstCall/ -- MICROPROCESSOR FORUM - Today's embedded systems targeted at imaging, connectivity and digital audio applications are requiring higher performance levels and more functionality. To meet these requirements, Motorola, Inc. (NYSE: MOT) is debuting at the 2002 Microprocessor Forum the next step in its ColdFire(R) microprocessor roadmap, the Version 5 (V5) superscalar core. At 333 MHz and 610 million instructions per second (MIPS) in 0.13 micron process technology, the V5 core offers significant performance increases over the V4 ColdFire core, previously the highest performing ColdFire core on the market. The superscalar microarchitecture of the V5 core increases the number of instructions that can be executed simultaneously, thereby increasing the performance of the core. With dual execution pipelines and a larger branch cache, this next-generation core provides a 2x performance increase compared to a 220 MHz MCF5407 device, a V4-based standard product. Over the last seven years, four generations of 32-bit ColdFire core microarchitectures have improved performance by a factor of 24 since the original 25 MIPS, 33 MHz Version 2 designs. "The synthesizable V5 core, with its nine-stage, superscalar pipelines, should allow customers to easily hit Motorola's quoted operating frequency of 300MHz, a significant leap beyond the capabilities of the V4 core," said Markus Levy, senior analyst with Instat/MDR and EEMBC president. "Furthermore, architectural enhancements such as improved branch prediction and dual multiply- accumulate units will increase this processor's performance efficiency from 50-200% depending on the application." ColdFire processors are used in a wide range of applications from set-top boxes to routers to MP3 players and fingerprint recognition systems. The V5 core builds on the success of the ColdFire family, which has shipped more than 52 million units to date. Using the proven ColdFire core microprocessor design methodology, the V5 core is 100 percent synthesizable. Therefore, it is easily ported to new manufacturing process technologies. This feature is designed to allow customers to take advantage of the very latest ColdFire core microprocessor design methodologies -- providing benefits such as lower power dissipation and smaller die sizes -- without adding additional development time or costs. "The V5 core is backward object code compatible with existing ColdFire cores, enabling customers to easily transition to very high-performance ColdFire devices without having to rewrite application code," said Dr. Franz Fink, general manager of Motorola's 32-Bit Embedded Controller Division. "Motorola is committed to making its products easy to use while maximizing our customers' time and resources with products that provide the best price/performance value." V5 ColdFire Features:
The ColdFire architecture was originally developed as a subset of the M68K family instruction set. It is based on a strong foundation of reuse to allow OEMs to quickly leverage previous investments. ColdFire V5 Development Support and Product Availability Plans for devices based on the Version 5 ColdFire core are expected to be announced in the second half of 2003.
Motorola, Inc. (NYSE:MOT) is a global leader in providing integrated communications and embedded electronic solutions. Sales in 2001 were $30 billion. For more information, please visit: www.motorola.com/ . MOTOROLA, ColdFire and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. SOURCE Motorola, Inc. NOTE TO EDITORS: Full-superscalar implementation: features a 4-stage, 64-bit instruction fetch pipeline that feeds two instantiations of the 5-stage operand execution pipeline and leverages micro-architectural technology from the MC68060 and the V4-V4e ColdFire designs.
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